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參數(shù)資料
| 型號(hào)： | IN74ACT161D |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 元件分類： | 通用總線功能 |
| 英文描述： | PRESETTABLE COUNTER |
| 中文描述： | 可預(yù)置計(jì)數(shù)器 |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大?。?/td> | 222K |
| 代理商： | IN74ACT161D |
IN74ACT161
1
P
RESETTABLE
C
OUNTER
High-Speed Silicon-Gate CMOS
The IN74ACT161 is identical in pinout to the LS/ALS161,
HC/HCT161. The IN74ACT161 may be used as a level converter
for interfacing TTL or NMOS outputs to High Speed CMOS Inputs.
The IN74ACT161 is programmable 4-bit synchronous modulo-
16 counter that feature parallel Load, asynchronous Reset, a
Carry Output for cascading and count-enable controls.
The IN74ACT161 is binary counter with asynchronous Reset.
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0
μ
A; 0.1
μ
A @ 25
°
C
Outputs Source/Sink 24 mA
ORDERING INFORMATION
IN74ACT161N Plastic
IN74ACT161D SOIC
T
A
= -40
°
to 85
°
C for all
packages
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
FUNCTION TABLE
Inputs
Enable
P
X
X
X
L
H
X
Outputs
Q1
Rese
t
L
H
H
H
H
H
X=don’t care
P0,P1,P2,P3 = logic level of Data inputs
Ripple Carry Out = Enable T
Q0
Q1
Q2
Q3
Load
Enable
T
X
X
L
X
H
X
Clock
Q0
Q2
Q3
Function
X
L
H
H
H
X
X
L
P0
L
P1
No change
No change
Count up
No change
L
P2
L
P3
Reset to “0”
Preset Data
No count
No count
Count
No count
PIN ASSIGNMENT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IN74ACT161N | PRESETTABLE COUNTER |
| IN74ACT163 | PRESETTABLE COUNTERS |
| IN74ACT163D | PRESETTABLE COUNTERS |
| IN74ACT163N | PRESETTABLE COUNTERS |
| IN74ACT164 | 8-BIT SERIAL-INPUT/PARALLEL-OUTPUT SHIFT REGISTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IN74ACT161N | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:PRESETTABLE COUNTER |
| IN74ACT163 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:PRESETTABLE COUNTERS |
| IN74ACT163D | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:PRESETTABLE COUNTERS |
| IN74ACT163N | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:PRESETTABLE COUNTERS |
| IN74ACT164 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:8-BIT SERIAL-INPUT/PARALLEL-OUTPUT SHIFT REGISTER |
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