參數(shù)資料
型號: IN74ACT109N
廠商: INTEGRAL JOINT STOCK COMPANY
英文描述: DUAL J-K FLIP-FLOP WITH SET AND RESET
中文描述: 雙JK觸發(fā)器與SET和RESET
文件頁數(shù): 1/5頁
文件大?。?/td> 183K
代理商: IN74ACT109N
IN74ACT109
D
UAL
J-K
F
LIP
-F
LOP
WITH
S
ET AND
R
ESET
High-Speed Silicon-Gate CMOS
1
The IN74ACT109 is identical in pinout to the LS/ALS109,
HC/HCT109. The IN74ACT109 may be used as a level converter
for interfacing TTL or NMOS outputs to High Speed CMOS inputs.
This device consists of two J-K flip-flops with individual set,
reset, and clock inputs. Changes at the inputs are reflected at the
outputs with the next low-to-high transition of the clock. Both Q to
Q outputs are available from each flip-flop.
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0
μ
A; 0.1
μ
A @ 25
°
C
Outputs Source/Sink 24 mA
ORDERING INFORMATION
IN74ACT109N Plastic
IN74ACT109D SOIC
T
A
= -40
°
to 85
°
C for all
packages
LOGIC DIAGRAM
PIN 16=V
CC
PIN 8 = GND
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Clock
X
X
X
L
Outputs
Q
H
L
H
*
L
Toggle
No Change
H
No Change
Set
L
H
L
H
H
H
H
H
X = Don’t care
*
Both outputs will remain high as long as
Set and Reset are low, but the output
states are unpredictable if Set and Reset
go high simultaneously.
Reset
H
L
L
H
H
H
H
H
J
X
X
X
L
H
L
H
X
K
X
X
X
L
L
H
H
X
Q
L
H
H
*
H
L
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