參數(shù)資料
型號(hào): IN74AC573N
廠商: INTEGRAL JOINT STOCK COMPANY
英文描述: Octal 3-State Noninverting Transparent Latch
中文描述: 八路三態(tài)同相透明鎖存器
文件頁數(shù): 1/5頁
文件大?。?/td> 218K
代理商: IN74AC573N
TECHNICAL DATA
456
Octal 3-State Noninverting
Transparent Latch
High-Performance Silicon-Gate CMOS
The IN74AC573 is identical in pinout to the LS/ALS573,
HC/HCT573. The device inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LS/ALS
outputs.
These latches appear transparent to data (i.e., the outputs change
asynchronously) when Latch Enable is high. When Latch Enable goes
low, data meeting the setup and hold time becomes latched.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
μ
A; 0.1
μ
A @ 25
°
C
High Noise Immunity Characteristic of CMOS Devices
Outputs Source/Sink 24 mA
IN74AC573
ORDERING INFORMATION
IN74AC573N Plastic
IN74AC573DW SOIC
T
A
= -40
°
to 85
°
C for all packages
FUNCTION TABLE
Inputs
Output
Output
Enable
Latch
Enable
D
Q
L
H
H
H
L
H
L
L
L
L
X
no change
H
X
X
Z
X = don’t care
Z = high impedance
LOGIC DIAGRAM
PIN 20=V
CC
PIN 10 = GND
PIN ASSIGNMENT
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