- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360859 > IMST425G17S Peripheral IC PDF資料下載
參數(shù)資料
| 型號(hào)： | IMST425G17S |
| 英文描述： | Peripheral IC |
| 中文描述： | 外圍芯片 |
| 文件頁(yè)數(shù)： | 24/74頁(yè) |
| 文件大?。?/td> | 563K |
| 代理商： | IMST425G17S |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)當(dāng)前第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)
IMS T400
/ 74
24
ProcClockOut
MemnotWrD0
MemnotRfD1
MemAD2–31
notMemWrB0–3
(Early write)
notMemS0
(CE)
notMemS1
(ALE)
T1
T2
T3
Tmx
T5
T6
T1
Tstate
TaVS0LTS0LaX
TWrHDX
TdVWrH
Data
Address
TS0LWrL
TWrLWrH
TS0HWrH
TS0LS0H
TS0LS1L
TS0LS1H
TS0HS1H
T4
Data
Data
notMemWrB0–3
(Late write)
TS0LWrL
TWrLWrH
9
5
1
Figure 5.8
IMS T400 external write cycle
5.4
Wait
Taking
MemWait
high with the timing shown (figure 5.9) will extend the duration of
T4
.
MemWait
is
sampled close to the falling edge of
ProcClockOut
during a
T3
or
T4
period, prior to, but not at the end
of
T4
. By convention,
notMemS4
is used to synchronize wait state insertion. If this or another strobe is
used, its delay should be such as to take the strobe low an even number of periods
Tm
after the start of
T1
, to coincide with a rising edge of
ProcClockOut
.
MemWait
may be kepthigh indefinitely, although ifdynamic memory refresh is used itshould notbe kept
high longenough to interfere with refresh timing.
MemWait
operates normallyduring all cycles,including
refresh and configuration cycles. It does not affect internal memory access in any way.
If thestartof
T5
wouldcoincidewitha fallingedgeof
ProcClockOut
an extrawait period
Tm
(
EW
)isgener-
atedbytheEMItoforcecoincidencewitharisingedge.Risingedgecoincidenceisonlyforcedifwaitstates
are added, otherwise coincidence with a falling edge is permitted.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IMST425-G17S | 32-Bit Microprocessor |
| IMST425-G20M | 32-Bit Microprocessor |
| IMST425G20S | Peripheral IC |
| IMST425-G20S | 32-Bit Microprocessor |
| IMST425G25S | Peripheral IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IMST425-G17S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| IMST425-G20M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| IMST425G20S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC |
| IMST425-G20S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| IMST425G25S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。