6
FN6140.2
June 15, 2006
Interrupt Control Functions
When the 82C55A is programmed to operate in mode 1 or
mode 2, control signals are provided that can be used as
interrupt request inputs to the CPU. The interrupt request
signals, generated from port C, can be inhibited or enabled
by setting or resetting the associated INTE flip-flop, using
the bit set/reset function of port C.
This function allows the programmer to enable or disable a
CPU interrupt by a specific I/O device without affecting any
other device in the interrupt structure.
INTE Flip-Flop Definition
(BIT-SET)-INTE is SET - Interrupt Enable
(BIT-RESET)-INTE is Reset - Interrupt Disable
NOTE: All Mask flip-flops are automatically reset during mode
selection and device Reset.
Operating Modes
Mode 0 (Basic Input/Output). This functional configuration
provides simple input and output operations for each of the
three ports. No handshaking is required, data is simply
written to or read from a specific port.
Mode 0 Basic Functional Definitions:
Two 8-bit ports and two 4-bit ports
Any Port can be input or output
Outputs are latched
Inputs are not latched
16 different Input/Output configurations possible
FIGURE 5. BIT SET/RESET FORMAT
D7 D6 D5
D4 D3 D2 D1 D0
BIT SET/RESET
1 = SET
0 = RESET
BIT SELECT
0
BIT SET/RESET FLAG
CONTROL WORD
DON’T
CARE
X
0 = ACTIVE
1 2345 67
01 0101 01
00 1100 11
00 0011 11
B0
B1
B2
MODE 0 PORT DEFINITION
A
B
GROUP A
#
GROUP B
D4
D3
D1
D0
PORT A
PORTC
(Upper)
PORT B
PORTC
(Lower)
0
Output
0
Output
0
1
Output
1
Output
Input
0
1
0
Output
2
Input
Output
0
1
Output
3
Input
0
1
0
Output
Input
4
Output
0
1
0
1
Output
Input
5
Output
Input
0
1
0
Output
Input
6
Input
Output
0
1
Output
Input
7
Input
1
0
Input
Output
8
Output
1
0
1
Input
Output
9
Output
Input
1
0
1
0
Input
Output
10
Input
Output
1
0
1
Input
Output
11
Input
1
0
Input
12
Output
1
0
1
Input
13
Output
Input
1
0
Input
14
Input
Output
1
Input
15
Input
Mode 0 (Basic Input)
tRA
tHR
tRR
tIR
tAR
tRD
tDF
RD
INPUT
CS, A1, A0
D7-D0
MS82C55A, MQ82C55A, MP82C55A