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參數(shù)資料
| 型號(hào)： | IMIXF652AYB |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 113K |
| 代理商： | IMIXF652AYB |
XF652
Enhanced Clock Generator for 2 DIMM Systems
Preliminary
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
Rev.1.3
5/6/97
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571
Page 1 of 7
PRODUCT FEATURES
n
Supports Pentium, Pentium
II, Pentium-Pro,
AMD and Cyrix CPUs.
n
Supports Intel chipset requirements.
n
Supports Sychronous DRAM designs
n
4 host (CPU/AGP) clocks & 8 SDRAM clocks.
n
Optional common or mixed supply mode :
(VDD = VDD3 = VDD4 = VDD2 = 3.3V)
(VDD = VDD3 = VDD4 = 3.3V, VDD2 = 2.5V)
n
< 250 pS skew on CPU buffers
n
< 250 pS skew on PCI buffers
n
Supports Single Pin Power Management.
n
F.A.S.T. (Frequency Augmentation System Test)
Function for board performance testing.
n
48 Pin SSOP package for minimum board space
BLOCK DIAGRAM
FREQUENCY TABLE (MHz)
SELECTORS
OUTPUTS (MHz)
FCT1
FCT0
S1
S0
CPUCLK
PCICLK
0
TEST
0
1
73.38
36.9
0
1
0
83.3
a.32
0
1
69.80
34.90
0
1
0
57.27
28.63
0
1
0
1
76.96
38.48
0
1
0
62.64
31.32
0
1
50.11
25.05
1
0
83.3
41.76
1
0
1
75
a.32
1
0
1
0
61.57
30.78
1
0
1
68.01
34.01
1
0
55
27.50
1
0
1
75
37.50
1
0
60
30.00
1
66.8
33.30
.A.32 = Asynchronous 32 MHz.
CONNECTION DIAGRAM
REF2
1
REF1
2
Vss
3
OSCin
4
Vss
17
S0
18
S1
19
FCT0
20
OSCout
5
FCT1
6
Vdd4
7
PCICLK_F
8
PCICLK1
9
Vss
10
PCICLK2
11
PCICLK3
12
PCICLK4
13
PCICLK5
14
Vdd4
15
PCICLK6
16
Vdd4
21
48 MHz
22
24 Mhz
23
Vss
24
Vdd
48
REF3
47
Vdd2
46
IOAPIC
45
PWR_DWN#
44
Vss
43
CPUCLK1
42
CPUCLK2
41
Vdd2
40
CPUCLK3
39
CPUCLK4
38
Vss
37
SDRAM1
36
SDRAM2
35
Vdd3
34
SDRAM3
33
SDRAM4
32
Vss
31
SDRAM5
30
SDRAM6
29
Vdd3
28
SDRAM7
27
SDRAM8
26
Vdd
25
REF
OSCin
OSCout
REF(1:3)
PLL2
24 MHz
48 MHz
PLL1
B
PCICLK(1:6)
6
dly
B
CPUCLK(1:4)
4
B
SDRAM (1:8)
8
Vdd2
IOAPIC
B
3
FCT0
S1
FCT1
PCICLK_F
S0
PWR_DWN#
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