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參數(shù)資料
| 型號： | ILC6383 |
| 廠商： | Fairchild Semiconductor Corporation |
| 元件分類： | DC/DC變換器 |
| 英文描述： | 1-Cell to 3-Cell Boost DC-DC Converter with True Load Disconnect, 3.3V, 5V or Adjustable Output |
| 中文描述： | 1節(jié)至3節(jié)電池升壓型DC - DC與真正的負(fù)載斷開，為3.3V，5V或可調(diào)輸出轉(zhuǎn)換器 |
| 文件頁數(shù)： | 7/15頁 |
| 文件大?。?/td> | 480K |
| 代理商： | ILC6383 |
PRODUCT SPECIFICATION
ILC6383
REV. 1.2.6 6/13/02
7
The Dual PWM/PFM mode architecture was designed spe-
cifically for applications such as wireless communications,
which need the spectral predictability of a PWM-type DC-
DC converter, yet also need the highest efficiencies possible,
especially in Standby mode.
Other Considerations
The other limitation of PWM techniques is that, while the
fundamental switching frequency is easier to filter out since
it's constant, the higher order harmonics of PWM will be
present and may have to be filtered out, as well. Any filtering
requirements, though, will vary by application and by actual
system design and layout, so generalizations in this area are
difficult, at best.
However, PWM control for boost DC-DC conversion is
widely used, especially in audio-noise sensitive applications
or applications requiring strict filtering of the high frequency
components.
Low Battery Detector
The ILC6383's low battery detector is a based on a CMOS
comparator. The negative input of the comparator is tied to
an internal 1.25V (nominal) reference, V
REF
. The positive
input is the LBI/SD pin. It uses a simple potential divider
arrangement with two resistors to set the LBI threshold as
shown in Figure 6. The input bias current of the LBI pin is
only 200nA. This means that the resistor values R1 and R2
can be set quite high. The formula for setting the LBI thresh-
old is:
V
LBI
= V
REF
x (1+R5/R6)
Since the LBI input current is negligible (<200nA), this
equation is derived by applying voltage divider formula
across R6. A typical value for R6 is 100k
.
R5 = 100k
x [(V
LBI
/V
REF
) -1], where V
REF
= 1.25V (nom.)
The LBI detector has a built in delay of 120ms. In order to
get a valid low-battery-output (LBO) signal, the input volt-
age must be lower than the low-battery-input (LBI) threshold
for a duration greater than the low battery hold time
(t
hold(LBI)
) of 120msec. This feature eliminates false trigger-
ing due to voltage transients at the battery terminal caused by
high frequency switching currents.
Figure 6. Low Battery Detector
The output of the low battery detector is an open drain
capable of sinking 2mA. A 10k
pull-up resistor is recom-
mended on this output.
For V
LBI
< 1.25V
The low battery detector can also be configured for
voltages <1.25V by bootstrapping the LBI input from V
OUT
.
The circuitry for this is shown in Figure 7.
Figure 7. V
LBI
< 1.25V
The following equation is used when V
IN
is lower than
1.25V:
R1 = R2 x [(V
REF
- V
IN
) / (V
OUT
- V
REF
)],
where V
REF
= 1.25V (nom.)
This equation can also be derived using voltage divider
formula across R2. A typical value for R2 is 100k
.
R6
R5
LBI/SD
3
2 V
IN
ILC6383
Shutdown
DELAY
100ms
1.25V
Internal
Reference
GND
7
LBO
3.3V
R
PU
6
+
-
V
OUT
8
R2
3
LBI/SD
V
IN
R1
ILC6383
+
-
1.25V
Internal
Reference
GND
7
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