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the drain source junctions (fig. 14). When the output switches from high to low, a current spike is
generated associated with the capacitor C1. On the low-to-high transition a spike of the same
polarity is generated by C2, preceded by a spike of the opposite polarity due to the charging of the
input capacity of the lower POWER DMOS transistor (fig. 15).
Figure 14: Intrinsic Structures in the POWER
DMOS Transistors
TRANSISTOR OPERATION
ON State
When one of the POWER DMOS transistor is ON it can be considered as a resistor RDS (ON)
throughout the recommended operating range. In this condition the dissipated power is given by :
PON = RDS (ON)
IDS
2
(RMS)
The low RDS (ON) of the Multipower-BCD process can provide high currents with low power
dissipation.
Figure 15:
Current Typical Spikes on the Sensing
Pin
OFF State
When one of the POWER DMOS transistor is
OFF the V
DS
voltage is equal to the supply volt-
age and only the leakage current IDSS flows. The power dissipation during this period is given by :
POFF = VS
IDSS
The power dissipation is very low and is negligible in comparison to that dissipated in the ON
STATE.
Transitions
As already seen above the transistors have an intrinsic diode between their source and drain that
can operate as a fast freewheeling diode in switched mode applications. During recirculation with
the ENABLE input high, the voltage drop across the transistor is RDS (ON)
ID and when it
reaches the diode forward voltage it is clamped. When the ENABLE input is low, the POWER MOS
is OFF and the diode carries all of the recirculation current. The power dissipated in the transitional
times in the cycle depends upon the voltage-current waveforms and in the driving mode. (see Fig.
7ab and Fig. 8abc).
Ptrans. = IDS (t)
VDS (t)