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參數(shù)資料
| 型號： | IDTQS5917T-100TJ |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 5917 SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大小： | 75K |
| 代理商： | IDTQS5917T-100TJ |
INDUSTRIALTEMPERATURERANGE
QS5917T
LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER
1
SEPTEMBER 2006
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2006 Integrated Device Technology, Inc.
DSC-5227/4
FUNCTIONAL BLOCK DIAGRAM
QS5917T
LOW SKEW CMOS PLL
CLOCK DRIVER WITH
INTEGRATED LOOP FILTER
DESCRIPTION
The QS5917T Clock Driver uses an internal phase locked loop (PLL)
to lock low skew outputs to one of two reference clock inputs. Eight
outputs are available: Q0-Q4, 2xQ, Q/2, Q5. Careful layout and design
insures < 500ps skew between the Q0-Q4, and Q/2 outputs. The QS5917T
includes an internal RC filter which provides excellent jitter characteris-
tics and eliminates the need for external components. In addition, TTL
level outputs reduce clock signal noise. Various combinations of feed-
back and a divide-by-2 in the VCO path allow applications to be custom-
ized for linear VCO operation over a wide range of input SYNC fre-
quencies. The VCO can also be disabled by the PLL_EN signal to allow
low frequency or DC testing. The LOCK output asserts to indicate when
phase lock has been achieved. The QS5917T is designed for use in
high-performance workstations, multi-board computers, networking hardware,
and mainframe systems. Several can be used in parallel or scattered
throughout a system for guaranteed low skew, system-wide clock distri-
bution networks.
For more information on PLL clock driver products, see Application
Note AN-227.
FEATURES:
5V operation
2xQ output, Q/2 output, Q output
Outputs tri-state while RST low
Internal loop filter RC network
Low noise TTL level outputs
< 500ps output skew, Q0-Q4
PLL disable feature for low frequency testing
Balanced Drive Outputs ± 24mA
132MHz maximum frequency (2xQ output)
Functional equivalent to Motorola MC88915
ESD > 2000V
Latch-up > –300mA
Available in QSOP and PLCC packages
R
D
Q
Q0
R
D
Q
Q1
R
D
Q
Q2
R
D
Q
Q3
R
D
Q
Q4
R
D
Q
Q5
R
D
Q
Q/2
Q
RST
0
1
0
/2
VCO
LOOP
FILTER
PHASE
DETECTOR
1
0
FREQ_SEL
REF_SEL
LOCK
FEEDBACK
SYNC0
SYNC1
PLL_EN
2xQ
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDTQS5917T100TQ | 制造商:Integrated Device Technology Inc 功能描述: |
| IDTQS5917T-100TQ | 制造商:Integrated Device Technology Inc 功能描述: |
| IDTQS5917T-100TQG | 功能描述:IC CLK DVR PLL 1:8 100MHZ 28QSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP（0.175"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR |
| IDTQS5917T-100TQG8 | 功能描述:IC CLOCK GEN LVTTL 100MHZ 28QSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| IDTQS5917T-132TJ8 | 功能描述:IC CLOCK GEN LVTTL 132MHZ 28PLCC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
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