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參數(shù)資料
| 型號： | IDTQS316212PV |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | QUICKSWITCH PRODUCTS HIGH-SPEED CMOS 24-BIT BUS-EXCHANGE SWITCH |
| 中文描述： | 316212 SERIES, DUAL 12-BIT EXCHANGER, TRUE OUTPUT, PDSO56 |
| 封裝： | SSOP-56 |
| 文件頁數(shù)： | 2/5頁 |
| 文件大?。?/td> | 40K |
| 代理商： | IDTQS316212PV |
2
INDUSTRIAL TEMPERATURE RANGE
IDTQS316212
HIGH-SPEED CMOS 24-BIT BUS-EXCHANGE SWITCH
PIN CONFIGURATION
SSOP/ TSSOP
TOP VIEW
Pins
Typ.
4
7.5
Max.
(1)
5
9
Unit
pF
pF
Control Inputs
Quickswitch Channels (Switch OFF)
CAPACITANCE
(T
A
= +25°C, f = 1MHz, V
IN
= 0V, V
OUT
= 0V)
NOTE:
1. This parameter is guaranteed but not production tested.
Pin Names
1
Ax -
12
Ax
1
Bx -
12
Bx
S
0
- S
2
I/O
I/O
I/O
I
Description
Bus A
Bus B
Data Select
PIN DESCRIPTION
Symbol
V
TERM
(2)
V
TERM
(3)
V
TERM
(3)
V
AC
I
OUT
P
MAX
Description
Max
Unit
V
V
V
V
mA
W
Supply Voltage to Ground
DC Switch Voltage V
S
DC Input Voltage V
IN
AC Input Voltage (pulse width
≤
20ns)
DC Output Current
MaximumPower
Dissipation (T
A
= 85°C)
Storage Temperature
–0.5 to +7
–0.5 to +7
–0.5 to +7
–3
120
0.93
0.77
–65 to +150
SSOP
TSSOP
T
STG
°C
ABSOLUTE MAX IMUM RATINGS
(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUMRATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximumrating
conditions for extended periods may affect reliability.
2. V
CC
termnals.
3. All termnals except V
CC
.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
S0
1A1
1A2
2A1
2A2
3A1
3A2
GND
4A1
4A2
5A1
5A2
6A1
6A2
7A1
7A2
V
CC
8A1
GND
8A2
9A1
9A2
10A1
10A2
11A1
11A2
12A1
12A2
S1
S2
1B1
1B2
2B1
2B2
3B1
GND
3B2
4B1
4B2
5B1
5B2
6B1
6B2
7B1
7B2
8B1
GND
8B2
9B1
9B2
10B1
10B2
11B1
11B2
12B1
12B2
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
Z = High-Impedance
S
2
S
1
S
0
xA
1
xA
2
Function
L
L
L
Z
Z
Disconnect
L
L
H
xB
1
Z
xA
1
to xB
1
L
H
L
xB
2
Z
xA
1
to xB
2
L
H
H
Z
xB
1
xA
2
to xB
1
H
L
L
Z
xB
2
xA
2
to xB
2
H
L
H
Z
Z
Disconnect
H
H
L
xB
1
xB
2
xA
1
to xB
1,
xA
2
to xB
2
H
H
H
xB
2
xB
1
xA
1
to xB
2,
xA
2
to xB
1
FUNCTION TABLE
(1)
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