參數(shù)資料
型號(hào)： IDT88P8341BHI
廠商： IDT, Integrated Device Technology Inc
文件頁(yè)數(shù)： 70/96頁(yè)
文件大?。?/td> 0K
描述： IC SPI3-SPI4 EXCHANGE 820-PBGA
標(biāo)準(zhǔn)包裝： 24
系列： *
其它名稱： 88P8341BHI
72
IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
SPI-4 egress status register (Block_base 0x0700 +
Register_offset 0x02)
E_CAL_LEN
The E_CAL_LEN value programmed defines the length of
the SPI-4 egress calendar. The actual length of the calendar is four times one
more than the value programmed into the E_CAL_LEN field. For example, if
the E_CAL_LEN field is programmed to 0x3F, the actual value used is 0x100.
The calendar length must be at least as large as the number of active SPI-4
egress LPs.
SPI-4 egress diagnostics register (Block_base
0x0700 + Register_offset 0x05)
TABLE 106 - SPI-4 EGRESS STATUS REGISTER
(REGISTER_OFFSET 0x02)
Field
Bits
Length
Initial Value
E_SYNCH
0
1
0
E_DSK_OOR
1
0
SCLK_AV
2
1
0
SPI-4 egress status register
TheSPI-4egressstatusregisterisatBlock_base0x0700andhasread-only
access.
The SPI-4 egress status register is used to set the state of the SPI-4 egress
synchronization.
The bit fields of the SPI-4 egress status register are described.
E_SYNCH
The SPI-4 egress E_SYNCH field describes the synchro-
nization state of the SPI-4 egress data path.
0=SPI-4 egress data path is out of synchronization
1=SPI-4 egress data path is in synchronization
E_DSK_OOR
The SPI-4 egress E_DSK_OOR field describes the de-
skew state of the SPI-4 egress data path.
0=SPI-4 egress data path de-skew is within range
1=SPI-4 egress data path de-skew is out of range
SCLK_AV
The SPI-4 egress SCLK_AV field describes the availability
state of the SPI-4 egress status channel clock. This function is not available if
SCLK < 0.5 MCLK.
0=SPI-4 egress status channel clock is not available
1=SPI-4 egress status channel clock is available
SPI-4 egress calendar configuration register
(Block_base 0x0700 + Register_offset 0x03 - 0x04)
TABLE 107 - SPI-4 EGRESS CALENDAR CONFIGU-
RATION REGISTER (REGISTER_OFFSET 0x03 -
0x04)
Field
Acc
Bits
Length
Initial
Value
E_CAL_M
RW
7:0
8
0
E_CAL_LEN
RW
13:8
6
0x01
The SPI-4 egress calendar configuration registers are at Block_base
0x0300 and has read and write access. The Register_offset for calendar_0 is
0x03. The register offset for calendar_1 is 0x04.
The bit fields of the SPI-4 egress calendar configuration register are
described.
The IDT88P8341 calendar length can be programmed to any multiple of 4
using suitable values for the calendar entries, calendar length and calendar
M. If the adjacent device is unable to configure its calendar to be a multiple of
4, conversion logic may be needed between the adjacent device SPI-4
status signals and the 88P8341 signals.
E_CAL_M
The E_CAL_M value programmed defines the number of
timesthecalendarsequenceisrepeatedbeforeaDIP-2parityand“11”framing
words are inserted. The actual calendar_M value used is one more than the
value programmed into the E_CAL_M field.
Field
Bits
Length
Initial
Value
E_FORCE_TRAIN
0
1
0
E_ERR_INS
1
0
E_DIP_NUM
5:2
4
0
BIT_DELAY
7:6
2
0
TheSPI-4egressdiagnosticsregisterisaddressedfromBlock_base0x0700
+ Register_offset 0x05. The SPI-4 egress diagnostics register has read and
writeaccess.
E_FORCE_TRAIN
TheE_FORCE_TRAINfieldisusedtoforcecontinu-
ous training on the SPI-4 egress status interface.
0=Normal status channel operation
1=Force continuous training on the SPI-4 egress status interface
E_ERR_INS The E_ERR_INS field is used to insert the number of DIP-
4 errors on the SPI-4 egress data interface that have been programmed into
theE_DIP_NUMfield.AftertheDIP-4errorsareinserted,theE_ERR_INSfield
willclearitself.
0=Normal status channel operation
1= Insert DIP-4 errors on the SPI-4 egress data interface
E_DIP_NUM The E_DIP_NUM field is used to create DPI-4 errors on the
SPI-4 egress data interface. The number of errors generated is equal to the
value of the E_DIP_NUM field.
BIT_DELAY The BIT_DELAY field is used to delay SPI-4 egress data bit
line 0 by the number of bits programmed into the BIT_DELAY field. This may
be used for diagnostics.
SPI-4 egress DIP-2 error counter (Block_base
0x0700 + Register_offset 0x06)
TABLE 109 - SPI-4 EGRESS DIP-2 ERROR
COUNTER (REGISTER_OFFSET 0x06)
Field
Bits
Length
Initial Value
DIP_2
15:0
16
0
The SPI-4 egress DIP-2 error counter is addressed from Block_base
0x0700+Register_offset0x06.TheSPI-2egressDIP-2errorcounterhasread
access,andautomaticallyclearsitselfafteraread.TheSPI-4egressDIP-2error
counterisusedinportdiagnosticstoverifytheintegrityoftheSPI-4egressstatus
channel.
DIP_2 The DIP_2 field is used to read the number of DIP-2 errors seen on
the SPI-4 egress status interface. The DIP_2 field saturates at the value
TABLE 108 - SPI-4 EGRESS DIAGNOSTICS REGIS-
TER (REGISTER_OFFSET 0x05)
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