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Table of Contents
5
June 19, 2006
IDT82V3280
WAN PLL
8.2
8.3
EXAMPLE OF JUNCTION TEMPERATURE CALCULATION ...................................................................................................................149
HEATSINK EVALUATION ..........................................................................................................................................................................149
9 ELECTRICAL SPECIFICATIONS ..................................................................................................................................150
9.1
ABSOLUTE MAXIMUM RATING ................................................................................................................................................................150
9.2
RECOMMENDED OPERATION CONDITIONS ..........................................................................................................................................150
9.3
I/O SPECIFICATIONS .................................................................................................................................................................................151
9.3.1
AMI Input / Output Port ................................................................................................................................................................ 151
9.3.1.1
Structure ......................................................................................................................................................................... 151
9.3.1.2
I/O Level ......................................................................................................................................................................... 151
9.3.1.3
Over-Voltage Protection ................................................................................................................................................. 153
9.3.2
CMOS Input / Output Port ............................................................................................................................................................ 153
9.3.3
PECL / LVDS Input / Output Port ................................................................................................................................................ 154
9.3.3.1
PECL Input / Output Port ................................................................................................................................................ 154
9.3.3.2
LVDS Input / Output Port ................................................................................................................................................ 156
9.4
JITTER & WANDER PERFORMANCE .......................................................................................................................................................157
9.5
OUTPUT WANDER GENERATION ............................................................................................................................................................160
9.6
INPUT / OUTPUT CLOCK TIMING .............................................................................................................................................................161
9.7
OUTPUT CLOCK TIMING ...........................................................................................................................................................................162
ORDERING INFORMATION ..........................................................................................................................................167