參數(shù)資料
型號(hào)： IDT82V3010PVG
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 通信及網(wǎng)絡(luò)
英文描述： T1/E1/OC3 TELECOM CLOCK GENERATOR WITH DUAL REFERENCE INPUTS
中文描述： SPECIALTY TELECOM CIRCUIT, PDSO56
封裝： GREEN, SSOP-56
文件頁(yè)數(shù)： 15/31頁(yè)
文件大小： 355K
代理商： IDT82V3010PVG
IDT82V3010
T1/E1/OC3 Telecom Clock Generator with Dual Reference Inputs
Functional Description
15
June 19, 2006
2.11
POWER SUPPLY FILTERING TECHNIQUES
Figure - 10 IDT82V3010 Power Decoupling Scheme
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. The 82V3010 provides separate power
supplies to isolate any high switching noise from the outputs to the
internal PLL. VDDD and VDDA should be individually connected to the
power supply plane through vias, and bypass capacitors should be used
for each pin. To achieve optimum jitter performance, power supply
isolation is required.
Figure - 10
illustrated how bypass capacitor and
ferrite bead should be connected to each power pin.
For the 82V3010, the decoupling for VDDA and VDDD must all be
handled individually. The switching power supply should be filtering with
a large bulk capacitor of 47 uF (1210 case size, ceramic) and a 0.1 uF
(0402 case size, ceramic).
VDDA provides power to the analog circuits. The analog power
supply VDDA should have low impedance. This can be achieved by
using one 10 uF (1210 case size, ceramic) and at least two 0.1 uF (0402
case size, ceramic) capacitors in parallel. The 0.1 uF (0402 case size,
ceramic) capacitors must be placed right next to the VDDA pins as close
as possible. Note that the 10 uF capacitor must be of 1210 case size,
and it must be ceramic for lowest ESR (Effective Series Resistance)
possible. The 0.1 uF should be of case size 0402, this offers the lowest
ESL (Effective Series Inductance) to achieve low impedance towards
the high speed range.
VDDD is the power rail for the core logic as well as I/O driver circuits.
For the VDDD, at least three 0.1 uF (0402 case size, ceramic) and one
10 uF (1210 case size, ceramic) capacitors are recommended. The 0.1
uF capacitors should be placed as close to the VDDD pins as possible.
Please refer to evaluation board schematic for details.
37
48
IDT82V3010
V
SS
V
SS
V
SS
V
SS
V
SS
3.3V
0.1
μ
F
0.1
μ
F
10
μ
F
12
18
27
38
47
V
DDA
V
DDA
13
26
19
V
DDD
V
DDD
SLF7028T-100M1R1
0.1
μ
F
3.3V
0.1
μ
F
10
μ
F
SLF7028T-100M1R1
V
DDD
0.1
μ
F
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