- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377488 > IDT82V3001A (Integrated Device Technology, Inc.) WAN PLL WITH SINGLE REFERENCE INPUT PDF資料下載
參數(shù)資料
| 型號： | IDT82V3001A |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | WAN PLL WITH SINGLE REFERENCE INPUT |
| 中文描述： | 廣域網(wǎng)鎖相環(huán)單參考輸入 |
| 文件頁數(shù)： | 8/27頁 |
| 文件大?。?/td> | 345K |
| 代理商： | IDT82V3001A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁
8
IDT82V3001A WAN PLL WITH SINGLE REFERENCE INPUT INDUSTRIAL TEMPERATURE RANGE
C16o
(CMOS) O
24
Clock 16.384 MHz.
This output is a 16.384 MHz clock used for ST-BUS operation.
C8o
(CMOS) O
23
Clock 8.192 MHz.
This output is an 8.192 MHz clock used for ST-BUS operation.
C4o
(CMOS) O
20
Clock 4.096 MHz.
This output is a 4.096 MHz clock used for ST-BUS operation.
C2o
(CMOS) O
17
Clock 2.048 MHz.
This output is a 2.048 MHz clock used for ST-BUS operation.
C3o
(CMOS) O
16
Clock 3.088 MHz.
This output is a 3.088 MHz clock used for T1 applications.
C1.5o
(CMOS) O
15
Clock 1.544 MHz.
This output is a 1.544 MHz clock used for T1 applications.
C6o
(CMOS) O
14
Clock 6.312 MHz.
This output is a 6.312 MHz clock used for DS2 applications.
F32o
(CMOS) O
40
Frame Pulse ST-BUS 8.192 Mb/s.
This is an 8 kHz 31 ns active low framing pulse, which marks the beginning of an ST-BUS frame. This is typically used for
ST-BUS operation at 8.192 Mb/s.
F16o
(CMOS) O
39
Frame Pulse ST-BUS 8.192 Mb/s.
This is an 8 kHz 61 ns active low framing pulse, which marks the beginning of an ST-BUS frame. This is typically used for
ST-BUS operation at 8.192 Mb/s.
F8o
(CMOS) O
36
Frame Pulse.
This is an 8 kHz 122 ns active high framing pulse, which marks the beginning of a frame.
F0o
(CMOS) O
33
Frame Pulse ST-BUS 2.048 Mb/s.
This is an 8 kHz 244 ns active low framing pulse, which marks the beginning of an ST-BUS frame. This is typically used
for ST-BUS operation at 2.048 Mb/s and 4.096 Mb/s.
RSP
(CMOS) O
41
Receive Sync Pulse.
This is an 8 kHz 488 ns active high framing pulse, which marks the beginning of an ST-BUS frame. This is typically used
to connect to Siemens MUNICH-32 device.
TSP
(CMOS) O
42
Transmit Sync Pulse.
This is an 8 kHz 488 ns active high framing pulse, which marks the beginning of an ST-BUS frame. This is typically used
to connect to Siemens MUNICH-32 device.
TDO
(CMOS) O
29
Test Serial Data Out.
JTAG serial data is output on this pin on the falling edge of TCK. This pin is held in high impedance state if JTAG scan is
not enabled.
TDI
I
32
Test Serial Data In.
JTAG serial test instructions and data are shifted in on this pin. This pin is internally pulled up to V
DD
.
TRST
I
30
Test Reset.
Asynchronously initializes the JTAG TAP controller by putting it in Test-Logic-Reset state. This pin is internally pulled up
to V
DD
. It is connected to the ground for normal applications.
TCK
I
28
Test Clock.
Provides a clock to JTAG test logic.
TMS
I
31
Test Mode Select.
JTAG signal that controls the state transitions of the TAP controller. This pin is internally pulled up to V
DD
.
IC0, IC1, IC2
-
53, 54, 55Internal Connection.
SS
when in normal operation.
Table - 1 Pin Description (Continued)
Name
Type
Pin
Number
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT82V3001APV | WAN PLL WITH SINGLE REFERENCE INPUT |
| IDT82V3002A | WAN PLL WITH DUAL REFERENCE INPUTS |
| IDT82V3002APV | WAN PLL WITH DUAL REFERENCE INPUTS |
| IDT82V3010 | T1/E1/OC3 TELECOM CLOCK GENERATOR WITH DUAL REFERENCE INPUTS |
| IDT82V3010PV | T1/E1/OC3 TELECOM CLOCK GENERATOR WITH DUAL REFERENCE INPUTS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT82V3001A_08 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:WAN PLL WITH SINGLE REFERENCE INPUT |
| IDT82V3001APV | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:WAN PLL WITH SINGLE REFERENCE INPUT |
| IDT82V3001APVG | 功能描述:IC PLL WAN W/SGL REF INP 56SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1 系列:- 類型:時鐘/頻率發(fā)生器，多路復用器 PLL:是 主要目的:存儲器，RDRAM 輸入:晶體 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:1:2 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設(shè)備封裝:16-TSSOP 包裝:Digi-Reel® 其它名稱:296-6719-6 |
| IDT82V3001APVG8 | 功能描述:IC PLL WAN W/SGL REF INP 56-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| IDT82V3002A | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:WAN PLL WITH DUAL REFERENCE INPUTS |
發(fā)布緊急采購，3分鐘左右您將得到回復。