![](http://datasheet.mmic.net.cn/330000/IDT82V2608BB_datasheet_16415999/IDT82V2608BB_8.png)
List of Figures
8
December 4, 2006
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Figure-23
Functional Diagram......................................................................................................................................10
IDT82V2608 PBGA208 Package Pin Assignment .......................................................................................11
Utopia Loopback ..........................................................................................................................................18
Line Interface Work Modes ..........................................................................................................................19
G.802 Mapping Mode ..................................................................................................................................21
Spaced Mapping Mode ................................................................................................................................21
Multiplexing Four 2 MHz Streams into One 8 MHz Stream.........................................................................22
Input FIFO Write Process ............................................................................................................................27
Output FIFO Read Process .........................................................................................................................28
Command Message Format ........................................................................................................................31
Command Reply Message Format ..............................................................................................................31
AlarmMessage Format ................................................................................................................................31
Reset Signal Timng Diagram......................................................................................................................82
Tx Utopia Interface Timng Diagram............................................................................................................83
Rx Utopia Interface Timng Diagram............................................................................................................83
Line Interface Transmt Timng Diagram......................................................................................................84
Line Interface Receive Timng Diagram.......................................................................................................84
Mcroprocessor Interface Timng Diagramfor Motorola CPU Read Cycle ...................................................85
Mcroprocessor Interface Timng Diagramfor Motorola CPU Write Cycle ...................................................86
Mcroprocessor Interface Timng Diagramfor Intel CPU Read Cycle ..........................................................87
Mcroprocessor Interface Timng Diagramfor Intel CPU Write Cycle ..........................................................88
SRAMInterface Timng Diagramfor Write Cycle .........................................................................................89
SRAMInterface Timng Diagramfor Read Cycle ........................................................................................90
List of Figures