參數(shù)資料
型號: IDT82V2608
廠商: Integrated Device Technology, Inc.
英文描述: INVERSE MULTIPLEXING FOR ATM
中文描述: 反向復(fù)用的ATM
文件頁數(shù): 15/98頁
文件大?。?/td> 398K
代理商: IDT82V2608
PIN DESCRIPTION
15
December 4, 2006
IDT82V2608
Inverse Multiplexing for ATM
RD
/
DS
M15
I
RD
: Read Operation
In parallel Intel mcroprocessor interface mode, this pin is asserted low by the mcroprocessor to initiate
a read cycle. Data is output to D[7:0] fromthe device.
DS
: Data Strobe
In parallel Motorola mcroprocessor interface mode, this pin is the data strobe of the parallel interface.
During a write operation (R
W
=0), data on D[7:0] is sampled into the device. During a read operation
(R
W
=1), data is output to D[7:0] fromthe device.
WR
/R
W
M16
I
WR
: Write Operation
In parallel Intel mcroprocessor interface mode, this pin is asserted low by the mcroprocessor to initiate
a write cycle. Data on D[7:0] is sampled into the device during a write operation.
R
W
: Read/Write Select
In parallel Motorola mcroprocessor interface mode, this pin is asserted low for write operation and high
for read operation.
D7
D6
D5
D4
D3
D2
D1
D0
P14
P13
R16
R15
R14
R13
T15
T14
I/O
D[7:0]: Data Bus
These pins function as a bi-directional data bus of the mcroprocessor interface.
A7
A6
A5
A4
A3
A2
A1
A0
M14
M13
N16
N15
N14
N13
N12
P16
I
A[7:0]: Address Bus
These pins function as an address bus of the mcroprocessor interface.
CS
L13
I
CS
: Chip Select
For each read or write operation, this pin must be changed fromhigh to low, and remains low until the
operation is over.
INT
R12
Open_drain
INT
: Interrupt Request
A low level on this pin indicates that an interrupt is pending inside the chip.
SRAMInterface
EMD7
EMD6
EMD5
EMD4
EMD3
EMD2
EMD1
EMD0
D4
C4
B4
A4
D5
C5
B5
A5
I/O
EMD[7:0]: Data Bus
Data Input/Output pins for the external SRAM Used for data exchange between the IDT82V2608 and
the external SRAM.
Table-1 Pin Description (Continued)
Name
Pin Number
Input/Output
Description
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