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13
IDT82V2048 OCTAL T1/E1 SHORT HAUL LINE INTERFACE UNIT
INDUSTRIAL TEMPERATURE RANGES
Figure-5 Dual Rail Interface with Data Recovery
Figure-6 Single Rail Mode
Table-2 System Interface Configuration (In Hardware Mode)
Pin MCLK
Pin TDNn
Interface
Clocked
High (
≥ 16 MCLK)
Single Rail Mode 1
Clocked
Pulse
Dual Rail mode with Clock Recovery
High
Pulse
Dual Rail mode with Data Recovery. Receive just slices the incoming data. Transmit is determined
by the status of TCLKn.
Low
Pulse
Receiver is powered down. Transmit is determined by the status of TCLKn.
Jitter
Attenuator
B8ZS/
HDB3/AMI
Decoder
B8ZS/
HDB3/AMI
Encoder
Slicer
Peak
Detector
CLK&Data
Recovery
(DPLL)
Line
Driver
Waveform
Shaper
LOS
Detector
One of Eight Identical Channels
RTIPn
RRINGn
TTIPn
TRINGn
LOSn
RCLKn
(RDP RDN)
RDPn
RDNn
TCLKn
TDNn
TDPn
Transmit
All Ones
Jitter
Attenuator
Note: The grey blocks are bypassed and the dotted blocks are selectable.
Jitter
Attenuator
Jitter
Attenuator
B8ZS/
HDB3/AMI
Decoder
Slicer
Peak
Detector
CLK&Data
Recovery
(DPLL)
Line
Driver
Waveform
Shaper
LOS
Detector
One of Eight Identical Channels
RTIPn
RRINGn
TTIPn
TRINGn
LOSn
RCLKn
RDn
CVn
TCLKn
BPVIn/TDNn
TDn
Transmit
All Ones
B8ZS/
HDB3/AMI
Encoder