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參數(shù)資料
| 型號： | IDT821024PP |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PCM CODEC QUAD NONPROG 44TQFP |
| 標準包裝： | 80 |
| 類型： | PCM 編解碼器/濾波器 |
| 數(shù)據(jù)接口： | PCM 音頻接口 |
| ADC / DAC 數(shù)量： | 4 / 4 |
| 三角積分調(diào)變： | 無 |
| 電壓 - 電源，模擬： | 4.75 V ~ 5.25 V |
| 電壓 - 電源，數(shù)字： | 4.75 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LQFP |
| 供應商設備封裝： | 44-TQFP |
| 包裝： | 托盤 |
| 其它名稱： | 821024PP |
3
INDUSTRIAL TEMPERATURE RANGE
IDT821024 QUAD NON-PROGRAMMABLE PCM CODEC
PIN DESCRIPTION
Pin Number
Name
I/O
PLCC
TQFP
Description
AGND
--
10
7
Analog Ground.
All ground pins should be connected to the ground plane of the circuit board.
VCCA
--
8
5
+5 V Analog Power Supply.
All power supply pins should be connected to the power plane of the circuit board.
DGND
--
27
30
Digital Ground.
All ground pins should be connected to the ground plane of the circuit board.
VCCD
--
25
27
+5 V Digital Power Supply.
All power supply pins should be connected to the power plane of the circuit board.
DR
I
24
26
Receive PCM Data Input.
The PCM data for Channel 1, 2, 3 and 4 is shifted serially into DR pin by the Receive Frame Sync Signal
(FSR) with MSB first. A byte of data for each channel is received every 125 s at the PCLK rate.
DX
O
26
28
Transmit PCM Data Output.
The PCM data for Channel 1, 2, 3 and 4 is shifted serially out to the DX pin by the Transmit Frame Sync Signal
(FSX) with MSB first. A byte of data for each channel is transmitted every 125 s at the PCLK rate. DX is high
impedance between time slots.
FSR1
FSR2
FSR3
FSR4
I
23
21
19
17
25
23
21
19
Receive Frame Sync Input for Channel 1/2/3/4
This 8kHz signal pulse identifies the receive time slot for Channel N on a system’s receive PCM frame. It must
be synchronized to PCLK.
FSX1
FSX2
FSX3
FSX4
I
22
20
18
16
24
22
20
18
Transmit Frame Sync Input for Channel 1/2/3/4
This 8 kHz signal pulse identifies the transmit time slot for Channel N on a system’s transmit PCM frame. It
must be synchronized to PCLK.
IREF
O
9
6
Reference Current.
The IREF output is biased at the internal reference voltage. A resistor placed from IREF to ground sets the
reference current used by the analog-to-digital converter to encode the signal current present on IINn pin (n is
channel number, n = 1 to 4) into digital form.
VOUT1
VOUT2
VOUT3
VOUT4
O
4
7
11
14
43
2
10
13
Voice Frequency Receiver Output for Channel 1/2/3/4
This is the output of receiver amplifier for Channel N. The received digital data from DR is processed and
converted to an analog signal at this pin.
IIN1
IIN2
IIN3
IIN4
I
5
6
12
13
44
1
11
12
Voice Frequency Transmitter Input for Channel 1/2/3/4
This is the input to the gain setting amplifier in the transmit path for Channel N. The analog voice band voltage
signal is applied to this pin through a resistor. This input is a virtual AC ground input, which is biased at the
IREF pin.
MCLK
I
30
35
Master Clock.
The Master Clock provides the clock for the DSP. It can be either 2.048 MHz or 4.096 MHz. The IDT821024
determines the MCLK frequency via the FSX inputs and makes the necessary internal adjustments
automatically. The MCLK frequency must be an integer multiple of the FSX frequency.
PCLK
I
29
34
PCM Clock.
The PCM Clock shifts out the PCM data to the DX pin and shifts in PCM data from the DR pin. The PCM clock
frequency is an integer multiple of the frame sync frequency. When PCLK is connected to MCLK, the PCM
clock can generate the DSP clock as well.
TSC
O
28
31
Time Slot Control.
This open drain output is low active. When the PCM data is transmitted to the DX pin for any of the four
channels, this pin will be pulled low.
A/
I
15
16
A/
-Law Selection.
When this pin is low, -Law is selected; when this pin is high, A-Law is selected. This pin can be connected to
VCCD or DGND pin directly.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IDT821024PPG | 功能描述:IC PCM CODEC QUAD NONPROG 44TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標準 ADC / DAC (db):81.5 / 88 動態(tài)范圍，標準 ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應商設備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| IDT821034 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:QUAD PCM CODEC WITH PROGRAMMABLE GAIN |
| IDT821034DN | 功能描述:IC PCM CODEC QUAD MPI 52-PQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標準 ADC / DAC (db):81.5 / 88 動態(tài)范圍，標準 ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應商設備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| IDT821034DNG | 功能描述:IC PCM CODEC QUAD MPI 52-PQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標準 ADC / DAC (db):81.5 / 88 動態(tài)范圍，標準 ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應商設備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| IDT821054 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE |
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