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參數(shù)資料
| 型號(hào)： | IDT7MP4060S20Z |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | Octal Bus Transceivers with 3-State Outputs 20-SOIC -40 to 85 |
| 中文描述： | 128K的× 32的CMOS靜態(tài)RAM模塊 |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 96K |
| 代理商： | IDT7MP4060S20Z |
7.09
5
IDT7MP4060/7MP4095
128K x 32 CMOS STATIC RAM MODULES
COMMERCIAL TEMPERATURE RANGE
TIMING WAVEFORM OF READ CYCLE NO. 1
(1)
TIMING WAVEFORM OF READ CYCLE NO. 2
(1,2,4)
TIMING WAVEFORM OF READ CYCLE NO. 3
(1,3,4)
NOTES:
1.
WE
is High for Read Cycle.
2. Device is continuously selected.
CS
= V
IL
.
3. Address valid prior to or coincident with
CS
transition low.
4.
OE
= V
IL
.
5. Transition is measured
±
200mV from steady state. This parameter is guaranteed by design, but not tested.
OE
t
AA
t
OH
ADDRESS
t
RC
CS
t
OE
DATA
OUT
t
ACS
t
CLZ
(5)
t
OHZ
(5)
t
CHZ
(5)
t
OLZ
(5)
3147 drw 04
3147 drw 05
t
AA
t
OH
t
OH
DATA
OUT
ADDRESS
t
RC
DATA VALID
PREVIOUS DATA VALID
3147 drw 06
t
ACS
t
CHZ
DATA
OUT
CS
(5)
t
CLZ(5)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT7MP4095 | Octal Bus Transceivers with 3-State Outputs 20-SOIC -40 to 85 |
| IDT7MP4095S15M | Octal Bus Transceivers with 3-State Outputs 20-SOIC -40 to 85 |
| IDT7MP4095S15Z | Octal Bus Transceivers with 3-State Outputs 20-BGA MICROSTAR JUNIOR -40 to 85 |
| IDT7MP4095S20M | Octal Bus Transceivers with 3-State Outputs 20-PDIP -40 to 85 |
| IDT7MP4095S20Z | Octal Bus Transceivers with 3-State Outputs 20-PDIP -40 to 85 |
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