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參數(shù)資料
| 型號： | IDT7MP4060S15Z |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | 128K x 32 CMOS STATIC RAM MODULES |
| 中文描述： | 128K的× 32的CMOS靜態(tài)RAM模塊 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 96K |
| 代理商： | IDT7MP4060S15Z |
7.09
3
IDT7MP4060/7MP4095
128K x 32 CMOS STATIC RAM MODULES
COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 5.0V
±
10%, T
A
= 0
°
C to +70
°
C)
Symbol
Parameter
Test Conditions
Min.
Max.
Unit
|I
LI
|
Input Leakage
(Data and
CS
)
Input Leakage
(Address,
WE
, and
OE
)
Output Leakage
Output Low
Output High
V
CC
= Max.; V
IN
= GND to V
CC
—
10
μ
A
|I
LI
|
V
CC
= Max.; V
IN
= GND to V
CC
—
40
μ
A
|I
LO
|
V
OL
V
OH
V
CC
= Max.;
CS
= V
IH
, V
OUT
= GND to V
CC
V
CC
= Min., I
OL
= 8mA
V
CC
= Min., I
OH
= –4mA
—
—
2.4
10
0.4
—
μ
A
V
V
Symbol
Parameter
Test Conditions
Max.
Unit
I
CC
Dymanic Operating
Current
Standby Supply
Current
f = f
MAX
;
CS
= V
IL
V
CC
= Max.; Output Open
CS
≥
V
IH,
V
CC
= Max.
Outputs Open, f = f
MAX
760
mA
I
SB
160
mA
I
SB1
Full Standby
Supply Current
CS
≥
V
CC
– 0.2V; f = 0
V
IN
> V
CC
– 0.2V or < 0.2V
60
mA
3147 tbl 07
5 pF*
+5 V
480
30 pF*
DATA
OUT
255
+5 V
480
DATA
OUT
255
Figure 1. Output Load
Figure 2. Output Load
(for tOLZ, tOHZ, tCHZ, tCLZ,
tWHZ, tOW)
* Includes scope and jig.
3147 drw 03
AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns
1.5V
1.5V
See Figures 1 and 2
3147 tbl 08
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