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參數(shù)資料
| 型號(hào)： | IDT7M1024S30GB |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | Octal Buffers/Drivers With 3-State Outputs 20-SOIC -40 to 85 |
| 中文描述： | 8K X 18 MULTI-PORT DEVICE SRAM MODULE, 30 ns, CPGA142 |
| 封裝： | CERAMIC, PGA-142 |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大?。?/td> | 113K |
| 代理商： | IDT7M1024S30GB |
7.4
6
IDT7M1024
4K x 36 BiCMOS SYNCHRONOUS DUAL-PORT STATIC RAM MODULE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF READ CYCLE WITH PORT-TO-PORT DELAY
An
An + 1
An + 2
An + 3
t
CLK
t
CLKH
t
CLKL
t
CSU
t
CHD
t
CSU
R/
W
ADDRESS
DATA
OUT
CE
CLKEN
CLOCK
OE
t
RSU
t
RHD
t
CQV
t
COH
t
CLZ
Qn
Qn + 1
Qn + 1
t
OHZ
t
OLZ
t
OE
t
CHZ
2809 drw 06
NOTES:
1. L_
CE
= R_
CE
= L, L_
CLKEN
= R_
CLKEN
= L
2.
OE
= L for the reading port.
DATA IN
R
CLOCK
L
R/
W
L
ADDR
R
R/
W
R
CLOCK
R
ADDR
L
NO
MATCH
MATCH
NO
MATCH
MATCH
VALID
t
CWDD
t
CQV
t
COH
DATA OUT
L
2809 drw 07
VALID
VALID
TIMING WAVEFORM OF READ CYCLE, EITHER SIDE
(1,2)
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