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參數(shù)資料
| 型號： | IDT7M1002S45G |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | 16K x 32 CMOS DUAL-PORT STATIC RAM MODULE |
| 中文描述： | 16K X 32 MULTI-PORT DEVICE SRAM MODULE, 45 ns, PMA121 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大小： | 166K |
| 代理商： | IDT7M1002S45G |
IDT7M1002
16K x 32 CMOS DUAL-PORT STATIC RAM MODULE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
7.02
9
TIMING WAVEFORM OF READ WITH
BUSY
(M/
S
≥
VIH)
(2)
2795 drw 11
ADDR
L
VALID
t
WC
t
WP
t
DW
t
DH
t
BDA
t
BDD
t
WDD
t
DDD(3)
t
APS
(1)
MATCH
MATCH
VALID
BUSY
L
DATA
OUT L
DATA
IN R
ADDR
R
R/
W
R
NOTES:
1. To ensure that the earlier of the two ports wins.
2. (L_
CS
= R_
CS
)
≤
V
IL
3.
OE
≤
V
IL
for the reading port.
TIMING WAVEFORM OF WRITE WITH PORT-TO-PORT DELAY (M/
S
≤
VIH)
(1, 2)
2795 drw 12
ADDR
L
VALID
t
WC
t
WP
t
DW
t
DH
t
WDD
t
DDD
MATCH
MATCH
VALID
DATA
OUT L
DATA
IN R
ADDR
R
R/
W
R
NOTES:
1.
BUSY
input equals HIGH for the writing port.
2. (L_
CS
= R_
CS
)
≤
V
IL
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