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參數(shù)資料
| 型號(hào)： | IDT7M1001S50C |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | 128K x 8 64K x 8 CMOS DUAL-PORT STATIC RAM MODULE |
| 中文描述： | 128K X 8 MULTI-PORT DEVICE SRAM MODULE, 50 ns, DMA64 |
| 文件頁(yè)數(shù)： | 9/11頁(yè) |
| 文件大?。?/td> | 171K |
| 代理商： | IDT7M1001S50C |
IDT7M1001/1003
128K/64K x 8 CMOS DUAL-PORT STATIC RAM MODULE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
7.5
9
NOTE:
1. L_
CS
= R_
CS
= LOW.
TIMING WAVEFORM OF WRITE WITH PORT-TO-PORT DELAY
(1)
SEMAPHORE OPERATION
For more details regarding semaphores & semaphore operations, please consult the IDT7006 datasheet.
ADDR
R
R/W
R
DATA
IN R
VALID
t
WC
t
WP
MATCH
VALID
t
DH
MATCH
t
WDD
t
DDD
t
DW
ADDR
L
DATA
OUT L
READ CYCLE
RIGHT PORT
WRITE CYCLE LEFT PORT
2804 drw 12
TRUTH TABLES
TABLE I: NON-CONTENTION READ/WRITE CONTROL
(1)
Inputs
(1)
Outputs
CS
R/
W
X
L
OE
SEM
I/O
0
- I/O
7
High-Z
DATA
IN
Mode
H
L
X
X
H
H
Deselected: Power Down
Write to Both Bytes
L
X
H
X
L
H
H
X
DATA
OUT
High-Z
Read Both Bytes
Outputs Disabled
NOTE:
1. A
OL
— A
12
≠
A
0R
— A
12R
2804 tbl 10
TABLE II: SEMAPHORE READ/WRITE CONTROL
(1)
Inputs Outputs
CS
R/
W
OE
SEM
I/O
0
- I/O
7
Mode
H
X
L
H
L
X
X
L
L
L
DATA
OUT
DATA
IN
—
Read Data in Semaphore Flag
Write D
IN0
into Semaphore Flag
Not Allowed
X
NOTE:
1. A
OL
— A
12
≠
A
0R
— A
12R
2804 tbl 11
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