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參數(shù)資料
| 型號： | IDT79R3052-40DL |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 40 MHz, RISC PROCESSOR, PQCC84 |
| 封裝： | 0.050 INCH PITCH, HEAT SINK, PLASTIC, LCC-84 |
| 文件頁數(shù)： | 20/26頁 |
| 文件大小： | 431K |
| 代理商： | IDT79R3052-40DL |
5.3
3
IDT79R3051/79R3052 INTEGRATED RISControllers
COMMERCIAL TEMPERATURE RANGE
Figure 3. Virtual-to-Physical Mapping of Extended Architecture Versions
Kernel Mapped
(kseg2)
Kernel Uncached
(kseg1)
Kernel Cached
(kseg0)
User Mapped
Cacheable
(kuseg)
Physical
Memory
0xffffffff
0xc0000000
0xa0000000
0x80000000
0x00000000
3548MB
512MB
Any
VIRTUAL
PHYSICAL
2874 drw 03
Figure 4. Virtual-to-Physical Mapping of Base Architecture Versions
1MB Kernel Rsvd
Kernel Cacheable
Tasks
Kernel/User
Cacheable
Tasks
Inaccessible
Kernel Boot
and I/O
0xffffffff
0xc0000000
0xa0000000
0x80000000
0x00000000
1024MB
2048MB
512MB
VIRTUAL
PHYSICAL
Kernel Cached
(kseg2)
Kernel Uncached
(kseg1)
Kernel Cached
(kseg0)
User
Cached
(kuseg)
1MB User Rsvd
2874 drw 04
The base versions of the architecture (the IDT79R3051
and IDT79R3052) remove the TLB and institute a fixed
address mapping for the various segments of the virtual
address space. The base processors support distinct kernel
and user mode operation without requiring page management
software, leading to a simpler software model. The memory
mapping used by these devices is illustrated in Figure 4. Note
that the reserved address spaces shown are for compatibility
with future family members; in the current family members,
references to these addresses are translated in the same
fashion as their respective segments, with no traps or excep-
tions taken.
When using the base versions of the architecture, the
system designer can implement a distinction between the
user tasks and the kernel tasks, without having to execute
page management software. This distinction can take the
form of physical memory protection, accomplished by ad-
dress decoding, or in other forms. In systems which do not
wish to implement memory protection, and wish to have the
kernel and user tasks operate out of a single unified memory
space, upper address lines can be ignored by the address
decoder, and thus all references will be seen in the lower
gigabyte of the physical address space.
相關PDF資料 |
PDF描述 |
|---|---|
| IDT79R3052E-40DL8 | 32-BIT, 40 MHz, RISC PROCESSOR, PQCC84 |
| IDT79R3052E-25J8 | 32-BIT, 25 MHz, RISC PROCESSOR, PQCC84 |
| IDT79R3052E-40MJ8 | 32-BIT, 40 MHz, RISC PROCESSOR, PQCC84 |
| IDT79R3081L-20MJ | 32-BIT, 20 MHz, RISC PROCESSOR, PQCC84 |
| IDT79R3081LE-20MJ | 32-BIT, 20 MHz, RISC PROCESSOR, PQCC84 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IDT79R3081-40DLG | 制造商:Integrated Device Technology Inc 功能描述:MPU R3081 RISC 32-Bit 40MHz 84-Pin PLCC |
| IDT79R3081E25DL | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT79R4650-100DP | 功能描述:IC MPU 64BIT W/DSP 100MHZ 208QFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標準包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應商設備封裝:357-PBGA（25x25） 包裝:托盤 |
| IDT79R4650-133DP | 功能描述:IC MPU 64BIT W/DSP 133MHZ 208QFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標準包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應商設備封裝:357-PBGA（25x25） 包裝:托盤 |
| IDT79R4700-100DP | 功能描述:IC MPU 64BIT 5V 100MHZ 208-QFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標準包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應商設備封裝:357-PBGA（25x25） 包裝:托盤 |
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