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參數(shù)資料
| 型號(hào)： | IDT77V1254L25L25PGI |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | Quad Port PHY (Physical Layer) for 25.6 and 51.2 ATM Networks |
| 中文描述： | 四端口PHY（實(shí)體層）為25.6和51.2 ATM網(wǎng)絡(luò) |
| 文件頁數(shù)： | 3/47頁 |
| 文件大?。?/td> | 840K |
| 代理商： | IDT77V1254L25L25PGI |
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September 21, 2001
IDT77V1254L25
Transmission Description
Refer to Figure 4. Cell transmission begins with the PHY-ATM Inter-
face. An ATM layer device transfers a cell into the 77V1254L25 across
the Utopia or DPI transmit bus. This cell enters a 3-cell deep transmit
FIFO. Once a complete cell is in the FIFO, transmission begins by
passing the cell, four bits (MSB first) at a time to the 'Scrambler'.
The 'Scrambler' takes each nibble of data and exclusive-ORs them
against the 4 high order bits (X(t), X(t-1), X(t-2), X(t-3)) of a 10 bit
pseudo-random nibble generator (PRNG). Its function is to provide the
appropriate frequency distribution for the signal across the line.
The PRNG is clocked every time a nibble is processed, regardless of
whether the processed nibble is part of a data or command byte. Note
however that only data nibbles are scrambled. The entire command byte
(X _C) is NOT scrambled before it's encoded (see diagram for illustra-
tion). The PRNG is based upon the following polynomial:
X
10
+ X
7
+ 1
With this polynomial, the four output data bits (D3, D2, D1, D0) will be
generated from the following equations:
D3 = d3 xor X(t-3)
D2 = d2 xor X(t-2)
D1 = d1 xor X(t-1)
D0 = d0 xor X(t)
The following nibble is scrambled with X(t+4), X(t+3), X(t+2), and
X(t+1).
A scrambler lock between the transmitter and receiver occurs each
time an X_X command is sent. An X_X command is initiated only at the
beginning of a cell transfer after the PRNG has cycled through all of its
states (2
10
- 1 = 1023 states). The first valid ATM data cell transmitted
after power on will also be accompanied with an X_X command byte.
Each time an X_X command byte is sent, the first nibble after the last
escape (X) nibble is XOR'd with 1111b (PRNG = 3FFx).
Because a timing marker command (X_8) may occur at any time, the
possibility of a reset PRNG start-of-cell command and a timing marker
command occurring consecutively does exist (e.g. X_X_X_8). In this
case, the detection of the last two consecutive escape (X) nibbles will
cause the PRNG to reset to its initial 3FFx state. Therefore, the PRNG is
clocked only after the first nibble of the second consecutive escape pair.
Once the data nibbles have been scrambled using the PRNG, the
nibbles are further encoded using a 4b/5b process. The 4b/5b scheme
ensures that an appropriate number of signal transitions occur on the
line. A total of seventeen 5-bit symbols are used to represent the sixteen
4-bit data nibbles and the one escape (X) nibble. The table below lists
the 4-bit data with their corresponding 5-bit symbols:
This encode/decode implementation has several very desirable prop-
erties. Among them is the fact that the output data bits can be repre-
sented by a set of relatively simple symbols;
Run length is limited to <= 5;
Disparity never exceeds +/- 1.
On the receiver, the decoder determines from the received symbols
whether a timing marker command (X_8) or a start-of-cell command was
sent (X_X or X_4). If a start-of-cell command is detected, the next 53
bytes received are decoded and forwarded to the descrambler. (See TC
Receive Block Diagram, Figure 5).
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