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參數(shù)資料
| 型號(hào)： | IDT74SSTV16859PAG8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 鎖存器 |
| 英文描述： | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO64 |
| 封裝： | GREEN, TSSOP-64 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大?。?/td> | 71K |
| 代理商： | IDT74SSTV16859PAG8 |
1
INDUSTRIALTEMPERATURERANGE
IDT74SSTV16859
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O
MARCH 2002
2003 Integrated Device Technology, Inc.
DSC-5947/8
c
IDT74SSTV16859
INDUSTRIAL TEMPERATURE RANGE
FUNCTIONAL BLOCK DIAGRAM
13-BIT TO 26-BIT REGISTERED
BUFFER WITH SSTL I/O
DESCRIPTION:
The SSTV16859 is a 13-bit to 26-bit registered buffer designed for 2.3V-
2.7V VDD and supports low standby operation. All data inputs and outputs
are SSTL_2 level compatible with JEDEC standard for SSTL_2.
RESET is an LVCMOS input since it must operate predictably during the
power-up phase.
RESET, which can be operated independent of CLK and
CLK, must be held in the low state during power-up in order to ensure
predictable outputs (low state) before a stable clock has been applied.
RESET, when in the low state, will disable all input receivers, reset all
registers, and force all outputs to a low state, before a stable clock has been
applied. With inputs held low and a stable clock applied, outputs will remain
low during the Low-to-High transition of
RESET.
APPLICATIONS:
Ideally suited for DIMM DDR registered applications
51
48
49
45
35
R
1D
C1
16
Q1A
RESET
CLK
VREF
D1
TO 12 OTH ER CHANNELS
32
Q1B
FEATURES:
2.3V to 2.7V Operation
SSTL_2 Class II style data inputs/outputs
Differential CLK input
RESET control compatible with LVCMOS levels
Latch-up performance exceeds 100mA
ESD >2000V per MIL-STD-883, Method 3015; >200V using
machine model (C = 200pF, R = 0)
Available in 56 pin VFQFPN and 64 pin TSSOP packages
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT74SSTVF16857PAG | 功能描述:IC BUFFER 14BIT SSTL I/O 48-TSSO RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:74SSTVF 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR) |
| IDT74SSTVF16857PAG8 | 功能描述:IC BUFFER 14BIT SSTL I/O 48-TSSO RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:74SSTVF 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR) |
| IDT74SSTVF16859NLG | 功能描述:IC BUFFER 13-26BIT SSTL 56VFQFPN RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:74SSTVF 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR) |
| IDT74SSTVF16859NLG8 | 功能描述:IC BUFFER 13-26BIT SSTL 56VFQFPN RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:74SSTVF 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR) |
| IDT74SSTVF16859PAG | 功能描述:IC BUFFER 13-26BIT SSTL 64-TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:74SSTVF 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR) |
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