Typ.
參數(shù)資料
型號: IDT74LVCH16646APAG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 3/8頁
文件大?。?/td> 0K
描述: IC BUS TRSCVR 3-ST 16BIT 56TSSOP
標(biāo)準(zhǔn)包裝: 34
系列: 74LVCH
邏輯類型: 寄存收發(fā)器,非反相
元件數(shù): 2
每個(gè)元件的位元數(shù): 8
輸出電流高,低: 24mA,24mA
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 56-TSSOP
包裝: 管件
其它名稱: 74LVCH16646APAG
INDUSTRIALTEMPERATURERANGE
IDT74LVCH16646A
3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER
3
Symbol
Parameter
Test Conditions
Min.
Typ.(1)
Max.
Unit
VIH
Input HIGH Voltage Level
VCC = 2.3V to 2.7V
1.7
V
VCC = 2.7V to 3.6V
2
VIL
Input LOW Voltage Level
VCC = 2.3V to 2.7V
0.7
V
VCC = 2.7V to 3.6V
0.8
IIH
Input Leakage Current
VCC = 3.6V
VI = 0 to 5.5V
±5 A
IIL
IOZH
High Impedance Output Current
VCC = 3.6V
VO = 0 to 5.5V
±10
A
IOZL
(3-State Output pins)
IOFF
Input/Output Power Off Leakage
VCC = 0V, VIN or VO
5.5V
±50
A
VIK
Clamp Diode Voltage
VCC = 2.3V, IIN = –18mA
–0.7
–1.2
V
VH
Input Hysteresis
VCC = 3.3V
100
mV
ICCL
Quiescent Power Supply Current
VCC = 3.6V
VIN = GND or VCC
——
10
A
ICCH
ICCZ
3.6
VIN 5.5V(2)
——
10
ΔICC
Quiescent Power Supply Current
One input at VCC - 0.6V, other inputs at VCC or GND
500
A
Variation
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = –40°C to +85°C
NOTES:
1. Typical values are at VCC = 3.3V, +25°C ambient.
2. This applies in the disabled state only.
NOTES:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
↑ = LOW-to-HIGH transition
2. The data output functions may be enabled or disabled by various signals at the x
OE or xDIR inputs. Data input functions are always enabled, i.e. data at the bus pins will
be stored on every LOW-to-HIGH transition of the clock inputs.
FUNCTION TABLE(1)
Inputs
Data I/O
(2)
x
OE
xDIR
xCLKAB
xCLKBA
xSAB
xSBA
xAx
xBx
Operation or Function
XX
X
Input
Unspecified
Store A, B unspecified(2)
XX
X
X
Unspecified
Input
Store B, A unspecified(2)
HX
↑↑
X
Input
Store A and B data
H
X
H or L
X
Input
Isolation, hold storage
L
X
L
Output
Input
Real time B data to A bus
L
X
H or L
X
H
Output
Input
Stored B data to A bus
L
H
X
L
X
Input
Output
Real time A data to B bus
L
H
H or L
X
H
X
Input
Output
Stored A data to B bus
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