參數(shù)資料
型號: IDT74LVCH16543APAG8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 1/6頁
文件大?。?/td> 0K
描述: IC TRSCVR TRI-ST 16BIT 56TSSOP
標準包裝: 2,000
系列: 74LVCH
邏輯類型: 寄存收發(fā)器,非反相
元件數(shù): 2
每個元件的位元數(shù): 8
輸出電流高,低: 24mA,24mA
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
供應商設備封裝: 56-TSSOP
包裝: 帶卷 (TR)
其它名稱: 74LVCH16543APAG8
INDUSTRIALTEMPERATURERANGE
IDT74LVCH16543A
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
1
March 2009
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2006 Integrated Device Technology, Inc.
DSC-4612/5
FEATURES:
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
μμμμμ W typ. static)
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in TSSOP package
FUNCTIONAL BLOCK DIAGRAM
DRIVE FEATURES:
High Output Drivers: ±24mA
Reduced system switching noise
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
IDT74LVCH16543A
DESCRIPTION
The LVCH16543A 16-bit registered transceiver is built using advanced
dual metal CMOS technology. The LVCH16543A can be used as two 8-bit
transceivers or one 16-bit transceiver. Separate latch-enable (
LEAB or
LEBA) and output-enable (OEAB or OEBA) inputs are provided for each
register to permit independent control in either direction of data flow. The
A-to-B enable (
CEAB) input must be low in order to enter data from the A
port or to output data from the B port.
LEABcontrolsthelatch function. When
LEAB is low, the A to B latches are transparent. A subsequent low-to-high
transition of
LEAB puts the A latches in the storage mode. OEAB performs
output enable function on the B port. Data flow from the B port to the A port
is similar but requires using
CEBA, LEBA, and OEBA inputs. Flow-through
organization of signal pins simplifies layout. All inputs are designed with
hysteresis for improved noise margin.
All pins of this 16-bit registered transceiver can be driven from either 3.3V
or 5V devices. This feature allows the use of this device as a translator in
a mixed 3.3V/5V supply system.
The LVCH16543A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The LVCH16543A has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
3.3V CMOS 16-BIT
REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O, BUS-HOLD
1
B1
1
LEAB
1
CEAB
1
OEAB
1
LEBA
1
CEBA
1
OEBA
TO SEVEN OTHER CHANNELS
1
A1
2
B1
2
LEAB
2
CEAB
2
OEAB
2
LEBA
2
CEBA
2
OEBA
2
A1
56
54
55
1
3
2
5
29
31
30
28
26
27
15
42
52
C1
1D
C1
1D
C1
1D
TO SEVEN OTHER CHANNELS
C1
1D
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相關代理商/技術參數(shù)
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IDT74LVCH16543APV 制造商:Integrated Device Technology Inc 功能描述: 制造商:Integrated Device Technology Inc 功能描述:LVC/LCX/Z SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
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