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參數(shù)資料
| 型號(hào)： | IDT74LVCH16276APA |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, 12-BIT EXCHANGER, TRUE OUTPUT, PDSO56 |
| 封裝： | TSSOP-56 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 82K |
| 代理商： | IDT74LVCH16276APA |
INDUSTRIALTEMPERATURERANGE
IDT74LVCH16276A
3.3VCMOS12-BITSYNCHRONOUSBUSEXCHANGER
1
JANUARY 2004
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2004 Integrated Device Technology, Inc.
DSC-4230/6
FEATURES:
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
μμμμμ W typ. static)
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in TSSOP package
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
DRIVE FEATURES:
High Output Drivers: ±24mA
Reduced system switching noise
IDT74LVCH16276A
3.3V CMOS 12-BIT
SYNCHRONOUS BUS
EXCHANGER WITH BUS-HOLD
AND 5 VOLT TOLERANT I/O
CE1B
CLK
CEA1B
SEL
OEB
CEA2B
A1:12
CE2B
A-1B
REGISTER
1B-A
REGISTER
M
U
X
1
0
12
1B1:12
2B1:12
12
OEA
CE
D
CE
Q
D
CONTROL
REGISTER
2B-A
REGISTER
CE
Q
D
A-2B
REGISTER
CE
D
Q
12
1
29
56
28
30
27
55
2
DESCRIPTION:
The LVCH16276A synchronous bus exchanger is built using advanced
dual metal CMOS technology.The LVCH16276A
is a high-speed,
bidirectional, 12-bit, registered, bus multiplexer for use in synchronous
memory interleaving applications. All registers have a common clock and
use a clock enable (
CExxx) on each data register to control data sequenc-
ing. The output enables and mux select (
OEA, OEB and SEL) are also
under synchronous control allowing direction changes to be edge trig-
gered events.
The tri-port bus exchanger has three 12-bit ports. Data may be
transferred between the A port and either/both of the B ports. The clock
enable (
CE1B, CE2B, CEA1B and CEA2B) inputs control the data storage.
Both B ports have a common output enable (
OEB) to aid in synchronously
loading the B registers from the B port.
All pins of the LVCH16276A can be driven from either 3.3V or 5V
devices. This feature allows the use of this device as a translator in a mixed
3.3V/5V supply system.
The LVCH16276A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The LVCH16276A has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
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