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參數(shù)資料
| 型號(hào)： | IDT74LVC540AQ8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20 |
| 封裝： | 0.635 MM PITCH, QSOP-20 |
| 文件頁(yè)數(shù)： | 1/5頁(yè) |
| 文件大小： | 106K |
| 代理商： | IDT74LVC540AQ8 |
1
EXTENDEDCOMMERCIALTEMPERATURERANGE
IDT74LVC540A
3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
APRIL 1999
1999
Integrated Device Technology, Inc.
DSC-4648/-
c
IDT74LVC540A
ADVANCE
INFORMATION
EXTENDED COMMERCIAL TEMPERATURE RANGE
DESCRIPTION:
The LVC540A octal buffer/driver is built using advanced dual metal
CMOS technology. This device is ideal for driving bus lines or buffer
memory address registers. This device features inputs and outputs on
opposite sides of the package that facilitate printed circuit board layout. The
3-state control gate is a 2-input AND gate with active-low inputs so that if
either output enable (
OE1 or OE2) input is high, all eight outputs are in the
high-impedance state.
The LVC540A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environ-
ment.
FEATURES:
–
0.5 MICRON CMOS Technology
–
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
–
1.27mm pitch SOIC, 0.65mm pitch SSOP,
0.635mm pitch QSOP, 0.65mm pitch TSSOP packages
–
Extended commercial range of – 40°C to +85°C
–VCC = 3.3V ±0.3V, Normal Range
–VCC = 2.3V to 3.6V, Extended Range
–
CMOS power levels (0.4 W typ. static)
–
Rail-to-Rail output swing for increased noise margin
–
All inputs, outputs and I/O are 5 Volt tolerant
–
Supports hot insertion
3.3V CMOS OCTAL
BUFFER/DRIVER
WITH 3-STATE OUTPUTS
AND 5 VOLT TOLERANT I/O
Functional Block Diagram
TO SEVEN O TH ER C H AN N ELS
OE1
OE2
1
19
2
Y1
A1
18
Drive Features for LVC540A:
–
High Output Drivers:
±24mA
–
Reduced system switching noise
2
3
1
A1
VCC
16
15
14
Y4
Y3
Y5
Y1
Y2
11
Y7
Y6
Y8
19
18
20
17
13
12
OE1
5
6
A6
7
A4
A5
4
A2
A3
SO 20-2
SO 20-7
SO 20-8
SO 20-9
8
9
GND
10
A7
A8
OE2
SOIC/ SSOP/ QSOP/ TSSOP
TOP VIEW
PIN CONFIGURATION
PIN DESCRIPTION
Pin Names
Description
OE1, OE2
Output-enable Inputs (Active LOW)
Ax
Data Inputs
Yx
3-State Outputs
FUNCTION TABLE(1)
Inputs
Outputs
OE1
OE2
Ax
Yx
LLL
H
LL
H
L
HX
X
Z
XH
X
Z
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
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