參數(shù)資料
型號(hào): IDT74LVC16646APA
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 通用總線功能
英文描述: 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O
中文描述: LVC/LCX/Z SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝: TSSOP-56
文件頁數(shù): 1/8頁
文件大?。?/td> 211K
代理商: IDT74LVC16646APA
1
EXTENDED COMMERCIAL TEMPERATURE RANGE
IDT74LVC16646A
3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER
Functional Block Diagram
APRIL 1999
1998 Integrated Device Technology, Inc.
DSC-4488/1
c
IDT74LVC16646A
APPLICATIONS:
5V and 3.3V mxed voltage systems
Data communication and telecommunication systems
EXTENDED COMMERCIAL TEMPERATURE RANGE
FEATURES:
Typical
t
SK(0)
(Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
0.635mmpitch SSOP, 0.50mmpitch TSSOP
and 0.40mmpitch TVSOP packages
Extended commercial range of -40°C to +85°C
V
CC
= 3.3V ±0.3V, Normal Range
V
CC
= 2.7V to 3.6V, Extended Range
CMOS power levels (0.4μW typ. static)
– All inputs, outputs and I/O are 5 Volt tolerant
Supports hot insertion
Drive Features for LVC16646A:
High Output Drivers: ±24mA
Reduced systemswitching noise
DESCRIPTION:
The LVC16646A 16-bit bus transceiver/register is built using advanced
dual metal CMOS technology. This high-speed, low power device is
organized as two independent 8-bit D-type transceivers with 3-state D-type
registers. The control circuitry is organized for multiplexed transmssion of
data between the A bus and B bus either directly or fromthe internal storage
registers. Each 8-bit transceiver/register features direction control (DIR),
over-riding Output Enable control (
OE
) and Select lines (SAB and SBA) to
select either real-time data or stored data. Separate clock inputs are
provided for A and B port registers. Data on the A or B data bus, or both,
can be stored in the internal registers by the low-to-high transitions at the
appropriate clock pins. Flow-through organization of signal pins simplifies
layout. All inputs are designed with hysteresis for improved noise margin.
All pins can be driven fromeither 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mxed 3.3V/5V supply system
The LVC16646A has been designed with a ±24mA output driver. The
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
3.3V CMOS 16-BIT BUS
TRANSCEIVER/REGISTER
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O
TO SEVEN OTHER CHANNELS
1
B
1
B REG
1D
C1
A REG
1D
1
A
1
1
SAB
1
CLKAB
1
SBA
1
OE
1
CLKBA
TO SEVEN OTHER CHANNELS
2
B
1
B REG
A REG
1D
2
A
1
2
SAB
2
CLKAB
2
SBA
2
OE
2
CLKBA
2
DIR
1
DIR
56
1
55
54
2
3
5
29
28
30
31
27
26
15
52
42
1D
C1
C1
C1
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