參數(shù)資料
型號(hào): IDT74FCT377DTSOG
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 1/6頁(yè)
文件大小: 0K
描述: IC FLIP FLOP OCTAL D 20-SOIC
標(biāo)準(zhǔn)包裝: 37
系列: 74FCT
功能: 設(shè)置(預(yù)設(shè))和復(fù)位
類型: D 型總線
輸出類型: 非反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 8
延遲時(shí)間 - 傳輸: 2ns
觸發(fā)器類型: 正邊沿
輸出電流高,低: 8mA,48mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 管件
其它名稱: 74FCT377DTSOG
INDUSTRIALTEMPERATURERANGE
IDT74FCT377AT/CT/DT
FASTCMOSOCTALDFLIP-FLOPWITHCLOCKENABLE
1
OCTOBER 2009
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2009 Integrated Device Technology, Inc.
DSC-2630/14
FEATURES:
A, C, and D grades
Low input and output leakage
≤≤≤≤≤1A (max.)
CMOS power levels
True TTL input and output compatibility:
–VOH = 3.3V (typ.)
–VOL = 0.3V (typ.)
High Drive outputs (-15mA IOH, 48mA IOL)
Meets or exceeds JEDEC standard 18 specifications
Power off disable outputs permit "live insertion"
Available in SOIC and QSOP packages
FUNCTIONAL BLOCK DIAGRAM
IDT74FCT377AT/CT/DT
FAST CMOS OCTAL
D FLIP-FLOP WITH
CLOCK ENABLE
DESCRIPTION:
The IDT74FCT377T is an octal D flip-flop built using an advanced dual
metal CMOS technology. The IDT74FCT377T has eight edge-triggered,
D-type flip-flops with individual D inputs and O outputs. The common
buffered Clock (CP) input loads all flip-flops simultaneously when the Clock
Enable (
CE) is low. The register is fully edge-triggered. The state of each
D input, one set-up time before the low-to-high clock transition, is transferred
to the corresponding flip-flop’s O output. The
CE input must be stable only
one set-up time prior to the low-to-high transition for predictable operation.
CE
CP
D
CP
Q
D 0
O 0
D
CP
Q
D 1
O 1
D
CP
Q
D 2
O 2
D
CP
Q
D 3
O 3
D
CP
Q
D 4
O 4
D
CP
Q
D 5
O 5
D
CP
Q
D 6
O 6
D
CP
Q
D 7
O 7
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