參數(shù)資料
型號(hào): IDT74FCT166245TPF8
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 總線收發(fā)器
英文描述: FCT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48
封裝: TVSOP-48
文件頁數(shù): 1/7頁
文件大?。?/td> 136K
代理商: IDT74FCT166245TPF8
1
IDT74FCT166245T/AT
FASTCMOS16-BITBIDIRECTIONALTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
JUNE 2000
1999
Integrated Device Technology, Inc.
DSC-5458/-
c
IDT74FCT166245T/AT
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS 16-BIT
BIDIRECTIONAL
TRANSCEIVER
DESCRIPTION:
The FCT166245T 16-bit transceiver is built using advanced dual metal
CMOS technology. These high-speed, low-power transceivers are ideal
for synchronous communication between two buses (A and B). The
Direction and Output Enable controls operate these devices as either two
independent 8-bit transceivers or one 16-bit transceiver. The direction
control pin (xDIR) controls the direction of data flow. The output enable pin
(x
OE) overrides the direction control and disables both ports. All inputs are
designed with hysteresis for improved noise margin.
The FCT166245T is suited for very low noise, point-to-point driving
where there is a single receiver, or a light lumped load (<100pF). The
buffers are designed to limit the output current to levels which will avoid noise
and ringing on the signal lines without using external series terminating
resistors. These parts have a ±8mA driver on the "A" Port and a +64/–32mA
driver on the "B" Port, making them ideal for interfacing noisy system busses
to noise sensitive interfaces.
FUNCTIONAL BLOCK DIAGRAM
1
DIR
1
OE
1
A 1
1
A 2
1
A 3
1
A 4
1
A 5
1
A 6
1
A 7
1
A 8
1
B 1
1
B 2
1
B 3
1
B 4
1
B 5
1
B 6
1
B 7
1
B 8
2
DIR
2
OE
2
A1
2
A2
2
A3
2
A4
2
A5
2
A6
2
A7
2
A8
2
B1
2
B2
2
B3
2
B4
2
B5
2
B6
2
B7
2
B8
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage ≤ 1A (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
Light Drive A Port: ±8mA
High Drive B Port: +64mA, –32mA
Minimal system switching noise
Typical VOLP (Output Ground Bounce) < 0.25V at VCC = 5V,TA
= 25°C (A Port Switching)
Power off disable outputs permit “l(fā)ive insertion”
Available in SSOP, TSSOP, or TVSOP packages
相關(guān)PDF資料
PDF描述
IDT74FCT16651CTPV FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO56
IDT54FCT16651CTE FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDFP56
IDT74FCT16651ETPA FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO56
IDT54FCT16651TE FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDFP56
IDT74FCT16651ATPA FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO56
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