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參數(shù)資料
| 型號： | IDT74FCT16543CTPVG |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX 16BIT LATCHED 56-SSOP |
| 標(biāo)準(zhǔn)包裝： | 26 |
| 系列： | 74FCT |
| 邏輯類型： | 寄存收發(fā)器，非反相 |
| 元件數(shù)： | 2 |
| 每個元件的位元數(shù)： | 8 |
| 輸出電流高，低： | 32mA，64mA |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-BSSOP（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 56-SSOP |
| 包裝： | 管件 |
| 其它名稱： | 74FCT16543CTPVG |
1
IDT74FCT16543AT/CT/ET
FAST CMOS 16-BIT LATCHED TRANSCEIVER
INDUSTRIALTEMPERATURERANGE
SEPTEMBER 2009
INDUSTRIAL TEMPERATURE RANGE
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage
≤≤≤≤≤1A (max.)
VCC = 5V ±10%
High drive outputs (–32mA IOH, 64mA IOL)
Power off disable outputs permit “l(fā)ive insertion”
Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V,
TA = 25°C
Available in SSOP, TSSOP, and TVSOP packages
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2009 Integrated Device Technology, Inc.
DSC-5444/5
IDT74FCT16543AT/CT/ET
FAST CMOS
16-BIT LATCHED
TRANSCEIVER
DESCRIPTION:
The FCT16543T 16-bit latched transceivers are built using advanced
dual metal CMOS technology. These high-speed, low-power devices are
organized as two independent 8-bit D-type latched transceivers with
separate input and output control to permit independent control of data flow
in either direction. For example, the A-to-B Enable (x
CEAB) must be low
in order to enter data from the A port or to output data from the B port. x
LEAB
controls the latch function. When x
LEAB is low, the latches are transparent.
A subsequent low-to-high transition of x
LEAB signal puts the A latches in
the storage mode. x
OEAB performs output enable function on the B port.
Data flow from the B port to the A port is similar but requires using x
CEBA,
x
LEBA, and xOEBA inputs. Flow-through organization of signal pins
simplifies layout. All inputs are designed with hysteresis for improved noise
margin.
The FCT16543T is ideally suited for driving high-capacitance loads
and low-impedance backplanes. The output buffers are designed with
power off disable capability to allow "live insertion" of boards when used
as backplane drivers.
C
D
1
B1
1
LEAB
1
CEAB
1
OEAB
1
LEBA
1
CEBA
1
OEBA
TO SEVEN OTHER CHANNELS
1
A1
2
B1
2
LEAB
2
CEAB
2
OEAB
2
LEBA
2
CEBA
2
OEBA
TO SEVEN OTHER CHANNELS
2
A1
C
D
C
D
C
D
56
54
55
1
3
2
5
29
31
30
28
26
27
15
52
42
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT74FCT16543CTPVG8 | 功能描述:IC TXRX 16BIT LATCHED 56-SSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器 系列:74FCT 標(biāo)準(zhǔn)包裝:47 系列:74LVX 邏輯類型:緩沖器/線路驅(qū)動器，非反相 元件數(shù):4 每個元件的位元數(shù):1 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:14-SOIC 包裝:管件 |
| IDT74FCT16543ETPA | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FCT16543ETPAG | 功能描述:IC TXRX 16BIT LATCHED 56-TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器 系列:74FCT 標(biāo)準(zhǔn)包裝:1,000 系列:74ABT 邏輯類型:寄存收發(fā)器，非反相 元件數(shù):1 每個元件的位元數(shù):8 輸出電流高，低:32mA，64mA 電源電壓:4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) |
| IDT74FCT16543ETPAG8 | 功能描述:IC TXRX 16BIT LATCHED 56-TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器 系列:74FCT 標(biāo)準(zhǔn)包裝:1,000 系列:74ABT 邏輯類型:寄存收發(fā)器，非反相 元件數(shù):1 每個元件的位元數(shù):8 輸出電流高，低:32mA，64mA 電源電壓:4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) |
| IDT74FCT16543ETPV | 制造商:Integrated Device Technology Inc 功能描述: |
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