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參數(shù)資料
| 型號： | IDT74FCT162H501ATPV8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | FCT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | SSOP-56 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 74K |
| 代理商： | IDT74FCT162H501ATPV8 |
1
IDT74FCT162H501AT/CT
FASTCMOS18-BITREGISTEREDTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
NOVEMBER 2002
IDT54/74FCT162H501AT/CT
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS
18-BIT REGISTERED
TRANSCEIVER
DESCRIPTION:
The FCT162H501T 18-bit registered transceivers are built using advanced
dual metal CMOS technology. These high-speed, low-power 18-bit registered
bustransceiverscombineD-typelatchesandD-typeflip-flopstoallowdataflow
in transparent, latched and clocked modes. Data flow in each direction is
controlledbyoutput-enable(OEABand
OEBA),latchenable(LEABandLEBA)
andclock(CLKABandCLKBA)inputs.ForA-to-Bdataflow,thedeviceoperates
intransparentmodewhenLEABishigh.WhenLEABislow,theAdataislatched
if CLKAB is held at a high or low logic level. If LEAB is low, the A bus data is
stored in the latch/flip-flop on the low-to-high transition of CLKAB. OEAB is the
output enable for the B port. Data flow from the B port to the A port is similar but
requires using
OEBA,LEBAandCLKBA.Flow-throughorganizationofsignal
pinssimplifieslayout.Allinputsaredesignedwithhysteresisforimprovednoise
margin.
The FCT162H501T has "Bus Hold" which retains the input's last state
whenevertheinputgoestohighimpedance. Thisprevents"floating"inputsand
eliminates the need for pull-up/down resistors.
OEB A
CLKB A
LEBA
OEAB
CLKA B
LEAB
B1
A1
C
D
C
D
C
TO 17 OTHER CH ANN ELS
1
30
28
27
55
2
3
54
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage
≤≤≤≤≤ 1A (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
Bus Hold retains last active bus state during 3-state
Eliminates the need for external pull up resistors
Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2002 Integrated Device Technology, Inc.
DSC-5434/2
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