參數(shù)資料
型號(hào): IDT74FCT162501CTPAG8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 1/7頁
文件大?。?/td> 0K
描述: IC REGSTERD TRSCVR 18BIT 56TSSOP
標(biāo)準(zhǔn)包裝: 2,000
系列: 74FCT
邏輯類型: 寄存收發(fā)器,非反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 18
輸出電流高,低: 24mA,24mA
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 56-TSSOP
包裝: 帶卷 (TR)
其它名稱: 74FCT162501CTPAG8
1
IDT74FCT162501AT/CT
FASTCMOS18-BITREGISTEREDTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
SEPTEMBER 2009
IDT74FCT162501AT/CT
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS
18-BIT REGISTERED
TRANSCEIVER
DESCRIPTION:
The FCT162501T 18-bit registered transceivers are built using advanced
dual metal CMOS technology. These high-speed, low-power 18-bit registered
bustransceiverscombineD-typelatchesandD-typeflip-flopstoallowdataflow
in transparent, latched and clocked modes. Data flow in each direction is
controlledbyoutput-enable(OEABand
OEBA),latchenable(LEABandLEBA)
and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device
operatesintransparentmodewhenLEABishigh.WhenLEABislow,theAdata
is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A bus
dataisstoredinthelatch/flip-floponthelow-to-hightransitionofCLKAB.OEAB
is theoutputenablefortheBport.DataflowfromtheBporttotheAportissimilar
but requires using
OEBA, LEBA and CLKBA. Flow-through organization of
signalpinssimplifieslayout.Allinputsaredesignedwithhysteresisforimproved
noise margin.
The FCT162501T has balanced output drive with current limiting resistors.
This offers low ground bounce, minimal undershoot, and controlled output fall
times–reducing the need for external series terminating resistors. The
FCT162501T is a plug-in replacement for the FCT16501T and ABT16501 for
on-board bus interface applications.
OEBA
CLKBA
LEBA
OEAB
CLKAB
LEAB
B1
A1
C
D
C
D
C
TO 17 OTHER CHANNELS
1
30
28
27
55
2
3
54
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2009 Integrated Device Technology, Inc.
DSC-2753/6
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage
≤≤≤≤≤ 1A (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
Balanced Output Drivers (±24mA)
Reduced system switching noise
Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V,
TA = 25°C
Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
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