參數(shù)資料
型號: IDT74CBTLV3257PY8
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 總線收發(fā)器
英文描述: CBTLV/3B SERIES, 4-BIT EXCHANGER, TRUE OUTPUT, PDSO16
封裝: SSOP-16
文件頁數(shù): 3/5頁
文件大小: 124K
代理商: IDT74CBTLV3257PY8
3
IDT74CBTLV3257
LOW-VOLTAGE QUAD 2:1 MUX/DEMUX BUS SWITCH
INDUSTRIALTEMPERATURERANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = – 40°C to +85°C
Symbol
Parameter
Test Conditions
Min.
Typ. (1)
Max.
Unit
VIK
Control Inputs, Data I/O
VCC = 3V, II =
18mA
– 1.2
V
II
Control Inputs, Data I/O
VCC = 3.6V, VI = VCC or GND
±1
A
IOZ
Data I/O
VCC = 3.6V, VO = 0 or 3.6V, switch disabled
20
A
IOFF
VCC = 0, VI or VO = 0 to 3.6V
50
A
ICC
VCC = 3.6V, IO = 0, VI = VCC or GND
10
A
ICC (2)
Control Inputs
VCC = 3.6V, One input at 3V, Other inputs at VCC or GND
300
A
CI
Control Inputs
VI = 3V or 0
4
pF
CIO(OFF)
A port
VO = 3V or 0,
OE = VCC = 3.3V
13
pF
B port
—6
Max at VCC = 2.3V
VI = 0
IO = 64mA
5
8
Typ at VCC = 2.5V
IO = 24ma
5
8
RON (3)
VI = 1.7V
IO = 15mA
27
40
VI = 0
IO = 64mA
5
7
VCC = 3V
IO = 24mA
5
7
VI = 2.4V
IO = 15mA
10
15
NOTES:
1.
Typical values are at VCC = 3.3V, +25°C ambient.
2.
The increase in supply current is attributable to each input that is at the specified voltage level rather than VCC or GND.
3.
This is measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined
by the lower of the voltages of the two (A or B) terminals.
SWITCHING CHARACTERISTICS
VCC = 2.5V ± 0.2V
VCC = 3.3V ± 0.3V
Symbol
Parameter
Min.
Max.
Min.
Max.
Unit
tPD(1)
Propagation Delay
A to B or B to A
0.15
0.25
ns
tSEL
Select Time
S to A or B
16.1
15.3
ns
tEN
Enable Time
S to B
16.1
15.3
ns
tDIS
Disable Time
S to B
14.8
14.5
ns
tEN
Enable Time
OE to A or B
15.6
1
5
ns
tDIS
Disable Time
OE to A or B
15.5
ns
NOTE:
1. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance when
driven by an ideal voltage source (zero output impedance).
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