參數資料
型號: IDT74AUC164245PAI
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 總線收發(fā)器
英文描述: AUC SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48
封裝: TSSOP-48
文件頁數: 1/8頁
文件大小: 101K
代理商: IDT74AUC164245PAI
INDUSTRIALTEMPERATURERANGE
IDT74AUC164245
CMOS16-BITLEVELSHIFTINGBUSTRANSCEIVERWITH3-STATEOUTPUTS
1
FEBRUARY 2006
IDT74AUC164245
INDUSTRIAL TEMPERATURE RANGE
CMOS 16-BIT LEVEL SHIFTING
BUS TRANSCEIVER WITH
3-STATE OUTPUTS
DESCRIPTION:
This 16-bit level shifting bus transceiver is built using advanced CMOS
technology. The AUC164245 is ideal for asynchronous communications
between data buses. The control function implementation minimizes external
timingrequirements.
The AUC164245 16-bit level shifting bus transceiver contains two separate
supply rails. The B port is designed to track VDDB, which accepts voltages from
0.8V to 2.7V. The A port and control inputs are designed to track VDDA, which
accepts voltages from 0.8V to 2.7V. This allows for user-selectable translation
for various level shifting system environments.
This device can be used as one 16-bit transceiver or two 8-bit transceivers.
ItallowsdatatransmissionfromAbustoBbusorfromBbustoAbus,depending
on the logic level at the direction-control (DIR) input. The output-enable (
OE)
inputcanbeusedtodisablethedevicesothatthebusesareeffectivelyisolated.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the outputs, preventing damaging current backflow
through the device when it is powered down.
The AUC164245 A and B ports are designed with ±9mA output drivers.
These drivers are capable of driving moderate loads while maintaining high
speed performance.
To ensure the high-impedance state during power up or power down,
OE
shouldbetiedtoVDDAthroughapull-upresistor;theminimumvalueoftheresistor
is determined by the current-sinking capability of the driver.
1
DIR
1
A1
1
A2
1
A3
1
A4
1
A5
1
A6
1
A7
1
A8
1
B8
1
B7
1
B6
1
B5
1
B4
1
B3
1
B2
1
B1
1
OE
2
DIR
2
A1
2
A2
2
A3
2
A4
2
A5
2
A6
2
A7
2
A8
2
B8
2
B7
2
B6
2
B5
2
B4
2
B3
2
B2
2
B1
2
OE
1
47
46
44
43
41
40
38
37
12
11
9
8
6
5
3
2
48
24
36
35
33
32
30
29
27
26
23
22
20
19
17
16
14
13
25
0
.8
V
-
2
.7
V
0
.8
V
-
2
.7
V
0
.8
V
-
2
.7
V
0
.8
V
-
2
.7
V
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2006 Integrated Device Technology, Inc.
DSC-5970/22
FEATURES:
VDDA AND VDDB = 0.8V - 2.7V
Inputs/outputs tolerant up to 3.6V
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
Supports Hot insertion:
A and B port output drivers: ±9mA @ 2.3V
Available in TSSOP package
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
High performance, low voltage communications systems
High performance, low voltage computing systems
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