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參數(shù)資料
| 型號： | IDT74ALVCHR16543PF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 0.40 MM PITCH, TVSOP-56 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大小： | 73K |
| 代理商： | IDT74ALVCHR16543PF |
1
EXTENDED COMMERCIAL TEMPERATURE RANGE
IDT74ALVCHR16543
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
1
OE BA
56
54
55
1
CE BA
1
LE BA
1
OEA B
1
3
2
1
CE AB
1
LEA B
1
A1
C1
1D
C1
1D
1
B 1
52
5
TO SEVEN OTHE R C HANN ELS
2
OE BA
29
31
30
2
CEB A
2
LE BA
2
OE A B
28
26
27
2
CE AB
2
LEA B
2
A1
C1
1D
C1
1D
2
B1
42
15
TO SEV EN OTHER CHA NNELS
NO
T RECOMMENDED
FOR
NEW
DESIGNS
FOR
NEW
DESIGNS
FOR
NEW
DESIGNS
FOR
NEW
DESIGNS
FOR
NEW
DESIGNS
APRIL 1999
1999 Integrated Device Technology, Inc.
DSC-4946/-
c
IDT74ALVCHR16543
EXTENDED COMMERCIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT REGIS-
TERED TRANSCEIVER WITH
3-STATE OUTPUTS
AND BUS-HOLD
APPLICATIONS:
3.3V High Speed Systems
3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
FEATURES:
– 0.5 MICRON CMOS Technology
–Typical tSK(0) (Output Skew) < 250ps
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– 0.40mm pitch TVSOP package
– Extended commercial range of – 40°C to +85°C
–VCC = 3.3V ±0.3V, Normal Range
–VCC = 2.7V to 3.6V, Extended Range
–VCC = 2.5V ±0.2V
– CMOS power levels (0.4W typ. static)
– Rail-to-Rail output swing for increased noise margin
Drive Features for ALVCHR16543:
– Balanced Output Drivers: ±12mA
– Low switching noise
DESCRIPTION:
This 16-bit registered transceiver is built using advanced dual metal
CMOS technology. The ALVCHR16543 can be used as two 8-bit
transceivers or one 16-bit transceiver. Separate latch-enable (LEAB or
LEBA) and output-enable (OEAB or OEBA) inputs are provided for each
register to permit independent control in either direction of data flow. The
A-to-B enable (CEAB) input must be low to enter data from A or to output
data from B. If CEAB is low and LEAB is low, the A-to-B latches are
transparent; a subsequent low-to-high transition of LEAB puts the A
latches in the storage mode. With CEAB and OEAB both low, the 3-state
B outputs are active and reflect the data present at the output of the A
latches. Data flow from B to A is similar, but requires using CEBA, LEBA,
and OEBA.
The ALVCHR16543 has series resistors in the device output struc-
ture which will significantly reduce line noise when used with light loads.
This driver has been designed to drive ±12mA at the designated
threshold levels.
The ALVCHR16543 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents
floating inputs and eliminates the need for pull-up/down resistors.
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