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參數(shù)資料
| 型號： | IDT74ALVCHR16501PA |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD |
| 中文描述： | ALVC/VCX/A SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | TSSOP-56 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 76K |
| 代理商： | IDT74ALVCHR16501PA |
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCHR16501
3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
1
J ANUARY 2004
INDUS T RIAL T E MPE RAT URE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2004 Integrated Device Technology, Inc.
DSC-4613/2
FEATURES:
0.5 MICRON CMOS Technology
Typical t
SK(o)
(Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
V
CC
= 3.3V ± 0.3V, Normal Range
V
CC
= 2.7V to 3.6V, Extended Range
V
CC
= 2.5V ± 0.2V
CMOS power levels (0.4
μ
W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in TSSOP package
FUNCTIONAL BLOCK DIAGRAM
IDT74ALVCHR16501
3.3V CMOS 18-BIT UNIVERSAL
BUS TRANSCEIVER WITH
3-STATE OUTPUTS
AND BUS-HOLD
DRIV E FEATURES:
Balanced Output Drivers: ±12mA
Low Switching Noise
APPLICATIONS:
3.3V high speed systems
3.3V and lower voltage computing systems
DESCRIPTION:
This 18-bit universal bus transceiver is built using advanced dual metal
CMOS technology. Data flow in each direction is controlled by output-enable
(OEAB and
OEBA
), latch enable (LEAB and LEBA) and clock (CLKAB and
CLKBA) inputs. For A-to-B data flow, the device operates in the transparent
mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB
is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/
flip-flop on the low-to-high transition of CLKAB. When OEAB is high, the outputs
are active. When OEAB is low, the outputs are in the high-impedance state. Data
flow fromB to A is simliar to that of A to B but uses
OEBA
, LEBA, and CLKBA.
The output enables are complementary (OEAB is active high and
OEBA
is active
low).
The ALVCHR16501 has series resistors in the device output structure which
will significantly reduce reduce line noise when used with light loads. This driver
has been designed to drive ±12mA at the designated threshold levels.
The ALVCHR16501 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating inputs
and elimnates the need for pull-up/down resistors.
B
1
A
1
OEBA
CLKBA
LEBA
CLKAB
OEAB
TO 17 OTHER CHANNELS
C1
1D
CLK
3
27
30
28
2
55
1
54
LEAB
C1
1D
CLK
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參數(shù)描述 |
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| IDT74ALVCHR16601PAG8 | 功能描述:TXRX 18BIT BUS 3.3V 3ST 56-TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 通用總線函數(shù) 系列:74LVC 產(chǎn)品變化通告:Product Discontinuation 09/Dec/2010 標準包裝:1,500 系列:74AVC 邏輯類型:通用總線驅動器 輸入數(shù):- 電路數(shù):18 位 輸出電流高，低:12mA，12mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:56-TFSOP（0.240"，6.10mm 寬） 供應商設備封裝:56-TSSOP 包裝:帶卷 (TR) |
| IDT74ALVCHS162830DF | 功能描述:IC ADD DVR 1-2BIT TRI-ST 80TVSOP RoHS:否 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅動器，接收器，收發(fā)器 系列:74ALVCHS 標準包裝:1,000 系列:74ABT 邏輯類型:寄存收發(fā)器，非反相 元件數(shù):1 每個元件的位元數(shù):8 輸出電流高，低:32mA，64mA 電源電壓:4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) |
| IDT74ALVCHS162830DF8 | 功能描述:IC ADD DVR 1-2BIT TRI-ST 80TVSOP RoHS:否 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅動器，接收器，收發(fā)器 系列:74ALVCHS 標準包裝:1,000 系列:74ABT 邏輯類型:寄存收發(fā)器，非反相 元件數(shù):1 每個元件的位元數(shù):8 輸出電流高，低:32mA，64mA 電源電壓:4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) |
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