參數(shù)資料
型號(hào): IDT74ALVCHR162245PAG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 2/6頁
文件大?。?/td> 0K
描述: IC TRANSCVR TRI-ST 16BIT 48TSSOP
標(biāo)準(zhǔn)包裝: 39
系列: 74ALVCHR
邏輯類型: 收發(fā)器,非反相
元件數(shù): 2
每個(gè)元件的位元數(shù): 8
輸出電流高,低: 12mA,12mA
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 48-TSSOP
包裝: 管件
其它名稱: 74ALVCHR162245PAG
INDUSTRIAL TEMPERATURE RANGE
2
IDT74ALVCHR162245
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
TSSOP
TOP VIEW
PIN CONFIGURATION
NOTE:
1. As applicable to the device type.
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
5
7
pF
COUT
Output Capacitance
VOUT = 0V
7
9
pF
CI/O
I/O Port Capacitance
VIN = 0V
7
9
pF
Symbol
Description
Max
Unit
VTERM(2) Terminal Voltage with Respect to GND
–0.5 to +4.6
V
VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–50 to +50
mA
IIK
Continuous Clamp Current,
±50
mA
VI < 0 or VI > VCC
IOK
Continuous Clamp Current, VO < 0
–50
mA
ICC
Continuous Current through each
±100
mA
ISS
VCC or GND
ABSOLUTE MAXIMUM RATINGS(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Pin Names
Description
x
OE
Output Enable Inputs (Active LOW)
DIR
Direction Control Inputs
xAx(1)
Side A Inputs or 3-State Outputs
xBx(1)
Side B Inputs or 3-State Outputs
PIN DESCRIPTION
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
Inputs
x
OE
xDIR
Outputs
L
Bus B data to A bus
L
H
Bus A data to B bus
H
X
High Z State
FUNCTION TABLE (EACH 8-BIT SECTION)(1)
1
DIR
1
B1
GND
VCC
GND
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
40
41
42
43
44
45
46
47
48
1
B2
1
B3
1
B4
1
B5
1
B6
1
B7
1
B8
2
B1
2
B2
GND
2
B3
2
B4
2
B6
2
B5
VCC
GND
2
B8
2
B7
2
DIR
1
OE
1
A1
GND
VCC
GND
1
A2
1
A3
1
A4
1
A5
1
A6
1
A7
1
A8
2
A1
2
A2
GND
2
A3
2
A4
2
A6
2
A5
VCC
GND
2
A8
2
A7
2
OE
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