參數(shù)資料
型號(hào): IDT74ALVCH32244BF8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 1/7頁
文件大小: 0K
描述: IC BUFF DVR TRI-ST 32BIT 96LFBGA
標(biāo)準(zhǔn)包裝: 3,000
系列: 74ALVCH
邏輯類型: 緩沖器/線路驅(qū)動(dòng)器,非反相
元件數(shù): 8
每個(gè)元件的位元數(shù): 4
輸出電流高,低: 24mA,24mA
電源電壓: 2.3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 96-LFBGA
供應(yīng)商設(shè)備封裝: 96-CABGA(13.5x5.5)
包裝: 帶卷 (TR)
其它名稱: 74ALVCH32244BF8
INDUSTRIALTEMPERATURERANGE
IDT74ALVCH32244
3.3VCMOS32-BITBUFFER/DRIVERWITH3-STATEOUTPUTS
1
AUGUST 2009
INDUSTRIAL TEMPERATURE RANGE
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
2006 Integrated Device Technology, Inc.
DSC-4906/5
FEATURES:
0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4
μμμμμ W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in 96-ball LFBGA package
FUNCTIONAL BLOCK DIAGRAM
DRIVE FEATURES:
High Output Drivers: ±24mA
Suitable for Heavy Loads
IDT74ALVCH32244
3.3V CMOS 32-BIT
BUFFER/ DRIVER WITH
3-STATE OUTPUTS AND
BUS-HOLD
DESCRIPTION:
This 32-bit buffer/driver is built using advanced dual metal CMOS
technology. This high-speed, low power device offers bus/backplane
interface capability with improved packing density. The device has a flow-
through organization for simplifying board layout. The three-state controls
operate this device in a Quad-Nibble, Dual-Byte or single 16-bit word mode.
All inputs are designed with hysteresis for improved noise margin.
The ALVCH32244 has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The ALVCH32244 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
APPLICATIONS:
3.3V high speed systems
3.3V and lower voltage computing systems
1
A1
1
A2
1
A3
1
A4
1
Y1
1
OE
1
Y2
1
Y3
1
Y4
2
A1
2
A2
2
A3
2
A4
2
Y1
2
OE
2
Y2
2
Y3
2
Y4
A3
A5
A6
B5
B6
A4
C5
C6
D5
D6
A2
A1
B2
B1
C2
C1
D2
D1
3
A1
3
A2
3
A3
3
A4
3
Y1
3
OE
3
Y2
3
Y3
3
Y4
4
A1
4
A2
4
A3
4
A4
4
Y1
4
OE
4
Y2
4
Y3
4
Y4
H4
E5
E6
F5
F6
H3
G5
G6
H6
H5
G2
G1
H1
H2
E2
E1
F2
F1
5
A1
5
A2
5
A3
5
A4
5
Y1
5
OE
5
Y2
5
Y3
5
Y4
6
A1
6
A2
6
A3
6
A4
6
Y1
6
OE
6
Y2
6
Y3
6
Y4
J3
J5
J6
K5
K6
J4
L5
L6
M5
M6
J2
J1
K2
K1
L2
L1
M2
M1
7
A1
7
A2
7
A3
7
A4
7
Y1
7
OE
7
Y2
7
Y3
7
Y4
8
A1
8
A2
8
A3
8
A4
8
Y1
8
OE
8
Y2
8
Y3
8
Y4
T4
N5
N6
P5
P6
N2
N1
P2
P1
T3
R5
R6
T6
T5
R2
R1
T1
T2
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