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參數(shù)資料
| 型號： | IDT74ALVCH16271PV |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | ALVC/VCX/A SERIES, 12 MULTIPLEXER AND DEMUX/DECODER, PDSO56 |
| 封裝： | 0.635 MM PITCH, SSOP-56 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大小： | 77K |
| 代理商： | IDT74ALVCH16271PV |
INDUSTRIALTEMPERATURERANGE
IDT74ALVCH16271
3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED BUS EXCHANGER
1
MARCH 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4476/2
FEATURES:
0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4
W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in SSOP, TSSOP, and TVSOP packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
3.3V high speed systems
3.3V and lower voltage computing systems
DRIVE FEATURES:
High Output Drivers: ±24mA
Suitable for heavy loads
LE2B
CLK
CLKENA1
OEA
1
B1
SEL
CLKENA2
CE
1D
C1
A1
2
B 1
1 of 12 Channels
LE1B
1
28
56
55
30
27
2
29
OEB
LE
1D
CE
1D
C1
LE
1D
0
1
23
6
8
IDT74ALVCH16271
3.3V CMOS 12-BIT TO
24-BIT MULTIPLEXED BUS
EXCHANGER WITH 3-STATE
OUTPUTS AND BUS-HOLD
DESCRIPTION:
The ALVCH16271 is intended for applications in which two separate data
pathsmustbemultiplexedonto,ordemultiplexedfrom,asingledatapath.This
deviceisparticularlysuitableasaninterfacebetweenconventionalDRAMsand
high-speedmicroprocessors.
AdataisstoredintheinternalA-to-Bregistersonthelow-to-hightransition
of the clock (CLK) input, provided that the clock-enable (CLKENA) inputs are
low. Proper control of these inputs allows two sequential 12-bit words to be
presentedasa24-bitwordontheBport. TransparentlatchesintheB-to-Apath
allowasynchronousoperationtomaximizememoryaccessthroughput.These
latchestransferdatawhenthelatch-enable(LE)inputsarelow.Theselect(SEL)
lineselects1Bor2BdatafortheAinputs.Dataflowiscontrolledbytheactive-
low output enables (OEA, OEB).
The ALVCH16271 has been designed with a ±24mA output driver. This
driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed
performance.
TheALVCH16271has“bus-hold”whichretainstheinputs’laststatewhen-
ever the input goes to a high impedance. This prevents floating inputs and
eliminatestheneedforpull-up/downresistors.
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