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參數(shù)資料
| 型號： | IDT74ALVCH162268PF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, 12-BIT EXCHANGER, TRUE OUTPUT, PDSO56 |
| 封裝： | TVSOP-56 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 84K |
| 代理商： | IDT74ALVCH162268PF |
INDUSTRIALTEMPERATURERANGE
IDT74ALVCH162268
3.3VCMOS12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
1
JANUARY 2004
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2004 Integrated Device Technology, Inc.
DSC-4535/2
FEATURES:
0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4
W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in TSSOP and TVSOP packages
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
This 12-bit to 24-bit registered bus exchanger is built using advanced
dual metal CMOS technology. This device is used for applications in which
data must be transferred from a narrow high-speed bus to a wide, lower-
frequency bus.
The ALVCH162268 device provides synchronous data exchange be-
tween the two ports. Data is stored in the internal registers on the low-to-
high transition of the clock (CLK) input when the appropriate clock-enable
(CLKEN) inputs are low. The select (SEL) line is synchronous with CLK and
selects 1B or 2B input data for the A outputs. For data transfer in the A-to-
B direction, a two-stage pipeline is provided in the A-to-1B path, with a single
storage register in the A-to-2B path. Proper control of these inputs allows
two sequential 12-bit words to be presented as a 24-bit word on the B-port.
Data flow is controlled by the active-low output enables (OEA and OEB).
These control terminals are registered to synchronize the bus-direction
changes with CLK.
The ALVCH162268 has series resistors in the device output structure of
the “B” port which will significantly reduce line noise when used with light
loads. This driver has been designed to drive ±12mA at the designated
threshold levels. The “A” port has a ±24mA driver.
The ALVCH162268 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
APPLICATIONS:
3.3V high speed systems
3.3V and lower voltage computing systems
DRIVE FEATURES:
High Output Drivers: ±24mA (A port)
Balanced Output Drivers: ±12mA (B port)
IDT74ALVCH162268
3.3V CMOS 12-BIT TO 24-BIT
REGISTERED BUS EX-
CHANGER WITH 3-STATE
OUTPUTS AND BUS-HOLD
CLKEN2B
CLK
CLKENA1
OEA
1
B1
SEL
CLKENA2
C1
1D
C1
1D
CE
1D
C1
A1
2
B1
1 of 12 Channels
CLKEN1B
1
28
56
55
30
27
2
29
OEB
CE
1D
C1
CE
1D
C1
CE
1D
C1
CE
1D
C1
23
6
8
C1
1D
0
1
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| IDT74ALVCH162268PA8 | ALVC/VCX/A SERIES, 12-BIT EXCHANGER, TRUE OUTPUT, PDSO56 |
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| IDT74ALVCH162373PAG | 功能描述:IC LATCH 16BIT TRANSP D 48-TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 鎖銷 系列:74ALVCH 標準包裝:2,500 系列:74HC 邏輯類型:D 型，可尋址 電路:1:8 輸出類型:標準 電源電壓:2 V ~ 6 V 獨立電路:1 延遲時間 - 傳輸:13ns 輸出電流高，低:5.2mA，5.2mA 工作溫度:-55°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:16-SOIC N 包裝:帶卷 (TR) |
| IDT74ALVCH162373PAG8 | 功能描述:IC XPARENT LATCH 16BIT D 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 鎖銷 系列:74ALVCH 標準包裝:48 系列:74VHCT 邏輯類型:D 型，可尋址 電路:1:8 輸出類型:標準 電源電壓:4.5 V ~ 5.5 V 獨立電路:1 延遲時間 - 傳輸:6ns 輸出電流高，低:8mA，8mA 工作溫度:-55°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:16-SOIC 包裝:管件 |
| IDT74ALVCH162373PVG | 功能描述:IC XPARENT LATCH 16BIT D 48-SSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 鎖銷 系列:74ALVCH 標準包裝:48 系列:74VHCT 邏輯類型:D 型，可尋址 電路:1:8 輸出類型:標準 電源電壓:4.5 V ~ 5.5 V 獨立電路:1 延遲時間 - 傳輸:6ns 輸出電流高，低:8mA，8mA 工作溫度:-55°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:16-SOIC 包裝:管件 |
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