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參數(shù)資料
| 型號： | IDT74ALVC16841PA8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | TSSOP-56 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 73K |
| 代理商： | IDT74ALVC16841PA8 |
INDUSTRIALTEMPERATURERANGE
IDT74ALVC16841
3.3VCMOS20-BITBUSINTERFACED-TYPELATCHWITH3-STATEOUTPUTS
1
JANUARY 2004
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2004 Integrated Device Technology, Inc.
DSC-4746/4
FEATURES:
0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4
μμμμμ W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in TSSOP package
FUNCTIONAL BLOCK DIAGRAM
DRIVE FEATURES:
High Output Drivers: ±24mA
Suitable for heavy loads
APPLICATIONS:
3.3V high speed systems
3.3V and lower voltage computing systems
3.3V CMOS 20-BIT
BUS-INTERFACE
D-TYPE LATCH WITH
3-STATE OUTPUTS
DESCRIPTION:
This20-bitbus-interfaceD-typelatchisbuiltusingadvanceddualmetalCMOS
technology. The ALVC16841 features 3-state outputs designed specifically for
driving highly capacitive relatively low-impedance loads. This device is particu-
larly suitable for implementing buffer registers, unidirectional bus drivers, and
working registers.
The ALVC16841 can be used as two 10-bit latches or one 20-bit latch. The
20latchesaretransparentD-typelatches.Thedevicehasnoninvertingdata(D)
inputs and provides true data at its outputs. While the latch-enable (1LE or 2LE)
input is high, the Q outputs of the corresponding 10-bit latch follow the D inputs.
WhenLEistakenlow,theQoutputsarelatchedatthelevelssetupattheDinputs.
Abufferedoutput-enable(
1OEor2OE)inputcanbeusedtoplacetheoutputs
of the corresponding 10-bit latch in either a normal logic state (high or low logic
levels) or a high-impedance state. In the high-impedance state, the outputs
neither load nor drive the bus lines significantly.
OEdoesnotaffecttheinternal
operation of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
The ALVC16841 has been designed with a ±24mA output driver. This driver
is capable of driving a moderate to heavy load while maintaining speed
performance.
1
D
C1
TO 9 OTHER CHANNELS
1
LE
1
OE
1
D1
1
Q1
1
D
C1
TO 9 OTHER CHANNELS
2
LE
2
OE
2
D1
2
Q1
1
56
55
2
28
29
42
15
Q
IDT74ALVC16841
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IDT74ALVC1G00DY | 制造商:INT_DEV_TECH 功能描述: |
| IDT74ALVCF162835APA | 功能描述:IC UNIV BUS DVR 18BIT 56TSSOP RoHS:否 類別:集成電路 (IC) >> 邏輯 - 通用總線函數(shù) 系列:74ALVCF 產(chǎn)品變化通告:Product Discontinuation 09/Dec/2010 標準包裝:1,500 系列:74AVC 邏輯類型:通用總線驅動器 輸入數(shù):- 電路數(shù):18 位 輸出電流高，低:12mA，12mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:56-TFSOP（0.240"，6.10mm 寬） 供應商設備封裝:56-TSSOP 包裝:帶卷 (TR) |
| IDT74ALVCF162835APA8 | 功能描述:IC UNIV BUS DVR 18BIT 56TSSOP RoHS:否 類別:集成電路 (IC) >> 邏輯 - 通用總線函數(shù) 系列:74ALVCF 產(chǎn)品變化通告:Product Discontinuation 09/Dec/2010 標準包裝:1,500 系列:74AVC 邏輯類型:通用總線驅動器 輸入數(shù):- 電路數(shù):18 位 輸出電流高，低:12mA，12mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:56-TFSOP（0.240"，6.10mm 寬） 供應商設備封裝:56-TSSOP 包裝:帶卷 (TR) |
| IDT74ALVCF162835APAG | 功能描述:IC UNIV BUS DVR 18BIT 56TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 通用總線函數(shù) 系列:74ALVCF 產(chǎn)品變化通告:Product Discontinuation 09/Dec/2010 標準包裝:1,500 系列:74AVC 邏輯類型:通用總線驅動器 輸入數(shù):- 電路數(shù):18 位 輸出電流高，低:12mA，12mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:56-TFSOP（0.240"，6.10mm 寬） 供應商設備封裝:56-TSSOP 包裝:帶卷 (TR) |
| IDT74ALVCF162835APAG8 | 功能描述:IC UNIV BUS DVR 18BIT 56TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 通用總線函數(shù) 系列:74ALVCF 產(chǎn)品變化通告:Product Discontinuation 09/Dec/2010 標準包裝:1,500 系列:74AVC 邏輯類型:通用總線驅動器 輸入數(shù):- 電路數(shù):18 位 輸出電流高，低:12mA，12mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:56-TFSOP（0.240"，6.10mm 寬） 供應商設備封裝:56-TSSOP 包裝:帶卷 (TR) |
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