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參數(shù)資料
| 型號(hào)： | IDT72V8988J |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 路由/交換 |
| 英文描述： | 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 128 x 128 |
| 中文描述： | TELECOM, DIGITAL TIME SWITCH, PQCC44 |
| 封裝： | 0.65 X 0.65 INCH, 0.05 INCH PITCH, PLASTIC, LCC-44 |
| 文件頁數(shù)： | 1/14頁 |
| 文件大?。?/td> | 141K |
| 代理商： | IDT72V8988J |
1
AUGUST 2003
3.3 VOLT TIME SLOT INTERCHANGE
DIGITAL SWITCH
128 x 128
IDT72V8988
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
DSC-5704/5
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The ST-BUS
is a trademark of Mitel Corp.
FUNCTIONAL BLOCK DIAGRAM
Microprocessor Interface
Control Register
Timing
Unit
RX0
RX1
RX2
RX3
TX0
TX1
TX2
TX3
ODE
F0i
C4i
V
CC
CS
DS
R/
W
A0/
A5
GND
DTA
D0/
D7
5704 drw01
Data
Memory
Output MUX
Connection
Memory
Receive
Serial Data
Streams
Transmit
Serial Data
Streams
FEATURES:
128 x 128 channel non-blocking switch
Automatic signal identification (ST-BUS
, GCI)
4 RX inputs—32 channels at 64 Kbit/s per serial line
4 TX outputs—32 channels at 64 Kbit/s per serial line
Three-state serial outputs
Mcroprocessor Interface (8-bit data bus)
Frame Integrity for data applications
3.3V Power Supply
Available in 44-pin Plastic Leaded Chip Carrier (PLCC), and
44-pin Plastic Quad Flatpack (PQFP)
Operating Temperature Range -40
°
C to +85
°
C
3.3V I/O with 5V Tolerant Inputs
DESCRIPTION:
The IDT72V8988 is an ST-BUS
/GCI compatible digital switch controlled
by a mcroprocessor. The IDT72V8988 can handle as many as 128, 64 Kbit/s
input and output channels. Those 128 channels are divided into 4 serial inputs
and outputs, each of which consists of 32 channels. The IDT72V8988 provides
per-channel variable or constant throughput delay modes and mcroprocessor
read and write access to individual channels. As an important function of a digital
switch is to maintain sequence integrity and mnimze throughput delay, the
IDT72V8988 is an ideal solution for most switching needs.
FUNCTIONAL DESCRIPTION
Frame sequence, constant throughput delay, and guaranteed mnimum
delay are high priority requirements in today’s integrated data and multimedia
networks. The IDT72V8988 provides these functions on a per-channel basis
using a standard mcroprocessor control interface. Each of the four serial lines
is designed to switch 64 Kbit/s PCMor N x 64 Kbit/s data.
In Processor Mode, the mcroprocessor can access the input and output time
slots to control other devices such as ISDN transceivers and trunk interfaces.
Supporting both GCI and ST-BUS
formats, IDT72V8988 has incorporated an
internal circuit to automatically identify the polarity and format of the frame
synchronization.
A functional block diagramof the IDT72V8988 device is shown on page 1.
The serial streams operate continuously at 2.048 Mb/s and are arranged in
125
μ
s wide frames each containing 32, 8-bit channels. Four input (RX0-3) and
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