參數資料
型號： IDT72V73273BBG
廠商： IDT, Integrated Device Technology Inc
文件頁數： 36/36頁
文件大小： 0K
描述： IC DGTL SW 32768X32768 208-BGA
標準包裝： 12
系列： 72V
類型： 多路復用器
電路： 8 x 1:1
電壓電源： 單電源
電源電壓： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 208-BGA
供應商設備封裝： 208-PBGA（17x17）
包裝： 托盤
其它名稱： 72V73273BBG
9
INDUSTRIAL TEMPERATURERANGE
IDT72V73273 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH WITH RATE MATCHING 32,768 x 32,768 CHANNELS
MEMORY BLOCK PROGRAMMING
TheIDT72V73273providesuserswiththecapabilityofinitializingtheentire
Connection Memory block in two frames. To set bits 2,1 and 0 of every
ConnectionMemoryHIGHlocation,settheFullBlockProgramto1,writethe
desiredpatternintotheBlockProgrammingDataBits(BPD2-0),andenable
theBlockProgramEnablebit.Alloftheblockprogrammingcontrolcanbefound
intheControlRegister.
TheblockprogrammingmodeisenabledbysettingtheBlockProgramEnable
bitoftheControlRegisterHIGH.WhentheBlockProgrammingEnablebitofthe
ControlRegisterissettoHIGH,theBlockProgrammingdatawillbeloadedinto
thebits2,1and0ofeveryConnectionMemoryHIGHlocationregardlessofthe
selected data rate for the group. The Connection Memory LOW bits will be
loaded with zeros when the Reset Connection Memory LOW(RCML) bit is
enabledandisotherwiseleftuntouched.Whenthememoryblockprogramming
iscomplete,thedeviceresetstheBlockProgrammingEnableandtheBPD2-0
bitstozero.
The IDT72V73273 also incorporates a feature termed Group Block
Programming. GroupBlockProgramming,allowssubsectionsoftheConnection
Memorytobeblockprogrammedasifthemicroprocessorwereaccessingthe
ConnectionMemoryHIGHlocationsback-to-backfashion. Thisresultsinone
ConnectionMemoryHighlocationbeingprogrammedforeach32iclockcycle.
ByhavingtheTSIperformthisfunctionitallowsthecontrollingmicroprocessor
more time to perform other functions. Also, the TSI can be more efficient in
programmingthelocationssinceoneCMHlocationisprogrammedevery32i
clock cycle. The Group Block Programming function programs "Channel n"
forallstreamsdeliniatedbythegroupbeforegoingto"Channeln+1". AC-code
representation is shown below. The Group Block Programming feature is
composedoftheBlockProgrammingStartAddress(BPSA),theBlockProgram-
mingEndAddress(BPEA),andtheBPEandBPDbitsintheControlRegister.
The BPSA contains a start address for the block programming and BPEA
containsanendaddress.Theblockprogrammingwillstartatthestartaddress
and program until the end address even if the end address is “l(fā)ess” than the
startaddress. Inotherwordsthereisnomechanismtopreventastartaddress
that is larger than the end address. If this occurs, the inverse CM locations in
thegivengroupareprogrammedresultingina“wraparound”effect.This“wrap
around”effectisindependentforboththestreamandchanneladdresses.This
isillustratedintheGroupBlockProgrammingdiagramseeFigure1GroupBlock
Programming. Usersmustnotinitiateablockprogramtooclose(ahead)ofthe
presenttransmitlocations. IfthisisdonetheTSImaysimultaneouslyaccessthe
CMlocationthatisbeingmodifiedandunpredictabledataonTXoutputsmay
occur. Users should take care when using the group block programming
feature. Usersmustnotinitiateablockprogramtooclose(ahead)ofthepresent
transmit location. If this is done the TSI may simultaneously access the CM
locationthatisbeingmodifiedandunpredictabledataonTXoutputsmayoccur.
Itshouldbenotedhowever,inordertoenabletheGroupBlockProgramming
the Full Block Program (FBP) must be 0.
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IDT72V801L10PFG 功能描述:IC FIFO 256X9 SYNC DUAL 64TQFP RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標準包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數據速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應商設備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
IDT72V801L10PFG8 制造商:Integrated Device Technology Inc 功能描述:IC SYNC FIFO 256X9 10NS 64QFP
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