10
COMMERCIALTEMPERATURERANGE
IDT72V3654/72V3664/72V3674 3.3V CMOS SyncBiFIFOTM WITH BUS-MATCHING
2,048 x 36 x 2, 4,096 x 36 x 2 and 8,192 x 36 x 2
SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY
VOLTAGE AND OPERATING FREE-AIR TEMPERATURE, CL = 30pF
IDT72V3654L10(1)
IDT72V3654L15
IDT72V3664L10(1)
IDT72V3664L15
IDT72V3674L10(1)
IDT72V3674L15
Symbol
Parameter
Min.
Max.
Min.
Max.
Unit
tA
Access Time, CLKA
↑ toA0-A35andCLKB↑ toB0-B35
2
6.5
2
10
ns
tWFF
Propagation Delay Time, CLKA
↑ to FFA/IRA and CLKB↑
2
6.5
2
8
ns
to
FFB/IRB
tREF
Propagation Delay Time, CLKA
↑ to EFA/ORAandCLKB↑
1
6.5
1
8
ns
to
EFB/ORB
tPAE
Propagation Delay Time, CLKA
↑ to AEA and CLKB↑ to
1
6.5
1
8
ns
AEB
tPAF
Propagation Delay Time, CLKA
↑ to AFAand CLKB↑ to
1
6.5
1
8
ns
AFB
tPMF
Propagation Delay Time, CLKA
↑ to MBF1 LOW or MBF2
0
6.5
0
8
ns
HIGH and CLKB
↑ to MBF2 LOW or MBF1 HIGH
tPMR
Propagation Delay Time, CLKA
↑ to B0-B35(2)and CLKB↑
382
10
ns
to A0-A35(3)
tMDV
Propagation Delay Time, MBA to A0-A35 valid and MBB to
3
6.5
2
10
ns
B0-B35 valid
tRSF
Propagation Delay Time,
MRS1 or PRS1 LOW to AEB
1101
15
ns
LOW,
AFA HIGH, and MBF1 HIGH and MRS2 or PRS2
LOW to
AEA LOW, AFB HIGH, and MBF2 HIGH
tEN
Enable Time,
CSA or W/RA LOW to A0-A35 Active and
2
6
2
10
ns
CSB LOW and W/RB HIGH to B0-B35 Active
tDIS
Disable Time,
CSA or W/RA HIGH to A0-A35 at high
1
6
1
8
ns
impedance and
CSB HIGH or W/RB LOW to B0-B35 at
high impedance
NOTES:
1. For 10ns speed grade: Vcc = 3.3V
± 0.15V; TA = 0° to +70°.
2. Writing data to the mail1 register when the B0-B35 outputs are active and MBB is HIGH.
3. Writing data to the mail2 register when the A0-A35 outputs are active and MBA is HIGH.
(For 10ns speed grade only: Vcc = 3.3V ± 0.15V; TA = 0ο C to +70ο C; JEDEC JESD8-A compliant)