參數(shù)資料
型號(hào)： IDT72T72115L5BB
廠商： IDT, Integrated Device Technology Inc
文件頁(yè)數(shù)： 6/53頁(yè)
文件大小： 0K
描述： IC FIFO 131072X72 5NS 324-BGA
標(biāo)準(zhǔn)包裝： 1
系列： 72T
訪問時(shí)間： 5ns
電源電壓： 2.375 V ~ 2.625 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 324-BGA
供應(yīng)商設(shè)備封裝： 324-PBGA（19x19）
包裝： 托盤
其它名稱： 72T72115L5BB
14
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72T7285/72T7295/72T72105/72T72115 2.5V TeraSync
72-BIT FIFO
16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72
FUNCTIONAL DESCRIPTION
TIMING MODES: IDT STANDARD vs FIRST WORD FALL THROUGH
(FWFT) MODE
The IDT72T7285/72T7295/72T72105/72T72115 support two different
timing modes of operation: IDT Standard mode or First Word Fall Through
(FWFT) mode. The selection of which mode will operate is determined during
Master Reset, by the state of the FWFT/SI input.
If, at the time of Master Reset, FWFT/SI is LOW, then IDT Standard mode
willbeselected.ThismodeusestheEmptyFlag (
EF)toindicatewhetherornot
there are any words present in the FIFO. It also uses the Full Flag function (
FF)
to indicate whether or not the FIFO has any free space for writing. In IDT
Standard mode, every word read from the FIFO, including the first, must be
requested using the Read Enable (
REN) and RCLK.
If, at the time of Master Reset, FWFT/SI is HIGH, then FWFT mode will be
selected. This mode uses Output Ready (
OR)toindicatewhetherornotthere
is valid data at the data outputs (Qn). It also uses Input Ready (
IR) to indicate
whether or not the FIFO has any free space for writing. In the FWFT mode, the
first word written to an empty FIFO goes directly to Qn after three RCLK rising
edges,
REN = LOW is not necessary. Subsequent words must be accessed
using the Read Enable (
REN) and RCLK.
Varioussignals,bothinputandoutputsignalsoperatedifferentlydepending
on which timing mode is in effect.
IDT STANDARD MODE
In this mode, the status flags,
FF, PAF, HF, PAE, and EF operate in the
manner outlined in Table 3. To write data into to the FIFO, Write Enable (
WEN)
mustbeLOW.DatapresentedtotheDATAINlineswillbeclockedintotheFIFO
on subsequent transitions of the Write Clock (WCLK). After the first write is
performed, the Empty Flag (
EF)willgoHIGH.Subsequentwriteswillcontinue
to fill up the FIFO. The Programmable Almost-Empty flag (
PAE)willgoHIGH
after n + 1 words have been loaded into the FIFO, where n is the empty offset
value. The default setting for these values are stated in the footnote of Table 2.
Thisparameterisalsouserprogrammable.SeesectiononProgrammableFlag
OffsetLoading.
If one continued to write data into the FIFO, and we assumed no read
operationsweretakingplace,theHalf-Fullflag(
HF)wouldtoggletoLOWonce
the 8,193rd word for IDT72T7285, 16,385th word for IDT72T7295, 32,769th
word for IDT72T72105 and 65,537th word for IDT72T72115, respectively was
written into the FIFO. Continuing to write data into the FIFO will cause the
Programmable Almost-Full flag (
PAF) to go LOW. Again, if no reads are
performed, the
PAF willgoLOWafter(16,384-m)writesfortheIDT72T7285,
(32,768-m)writesfortheIDT72T7295,(65,536-m)writesfortheIDT72T72105
and (131,072-m) writes for the IDT72T72115. The offset “m” is the full offset
value. The default setting for these values are stated in the footnote of Table 2.
Thisparameterisalsouserprogrammable.SeesectiononProgrammableFlag
OffsetLoading.
When the FIFO is full, the Full Flag (
FF)willgoLOW,inhibitingfurtherwrite
operations.Ifnoreadsareperformedafterareset,
FFwillgoLOWafterDwrites
to the FIFO. D = 16,384 writes for the IDT72T7285, 32,768 writes for the
IDT72T7295, 65,536 writes for the IDT72T72105 and 131,072 writes for the
IDT72T72115, respectively.
If the FIFO is full, the first read operation will cause
FF to go HIGH.
Subsequentreadoperationswillcause
PAFandHFtogoHIGHattheconditions
described in Table 3. If further read operations occur, without write operations,
PAE will go LOW when there are n words in the FIFO, where n is the empty
offsetvalue.ContinuingreadoperationswillcausetheFIFOtobecomeempty.
When the last word has been read from the FIFO, the
EFwillgoLOWinhibiting
further read operations.
REN is ignored when the FIFO is empty.
When configured in IDT Standard mode, the
EFandFFoutputsaredouble
register-bufferedoutputs.
Relevant timing diagrams for IDT Standard mode can be found in Figure
11, 12, 13 and 18.
FIRST WORD FALL THROUGH MODE (FWFT)
In this mode, the status flags,
IR, PAF, HF, PAE, and OR operate in the
manner outlined in Table 4. To write data into to the FIFO,
WENmustbeLOW.
DatapresentedtotheDATAINlineswillbeclockedintotheFIFOonsubsequent
transitions of WCLK. After the first write is performed, the Output Ready (
OR)
flag will go LOW. Subsequent writes will continue to fill up the FIFO.
PAEwillgo
HIGH after n + 2 words have been loaded into the FIFO, where n is the empty
offset value. The default setting for these values are stated in the footnote of
Table 2. This parameter is also user programmable. See section on Program-
mable Flag Offset Loading.
If one continued to write data into the FIFO, and we assumed no read
operations were taking place, the
HF would toggle to LOW once the 8,194th
word for the IDT72T7285, 16,386th word for the IDT72T7295, 32,770th word
for the IDT72T72105 and 65,538th word for the IDT72T72115, respectively
was written into the FIFO. Continuing to write data into the FIFO will cause the
PAF to go LOW. Again, if no reads are performed, the PAF will go LOW
after (16,385-m) writes for the IDT72T7285, (32,769-m) writes for the
IDT72T7295, (65,537-m) writes for the IDT72T72105 and (131,073-m) writes
for the IDT72T72115, where m is the full offset value. The default setting for
these values are stated in the footnote of Table 2.
WhentheFIFOisfull,theInputReady(
IR)flagwillgoHIGH,inhibitingfurther
write operations. If no reads are performed after a reset,
IR will go HIGH after
D writes to the FIFO. D = 16,385 writes for the IDT72T7285, 32,769 writes for
the IDT72T7295, 65,537 writes for the IDT72T72105 and 131,073 writes for
the IDT72T72115, respectively. Note that the additional word in FWFT mode
is due to the capacity of the memory plus output register.
If the FIFO is full, the first read operation will cause the
IR flag to go LOW.
Subsequent read operations will cause the
PAF and HF to go HIGH at the
conditions described in Table 4. If further read operations occur, without write
operations,the
PAEwillgoLOWwhentherearen+1wordsintheFIFO,where
n is the empty offset value. Continuing read operations will cause the FIFO to
become empty. When the last word has been read from the FIFO,
OR will go
HIGHinhibitingfurtherreadoperations.
RENisignoredwhentheFIFOisempty.
When configured in FWFT mode, the
OR flag output is triple register-
buffered, and the
IRflag output is double register-buffered.
Relevant timing diagrams for FWFT mode can be found in Figure 14, 15,
16 and 19.
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