參數(shù)資料
型號(hào)： IDT72835LB10PF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： DRAM
英文描述： CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUAL 4,096 x 18
中文描述： 2K X 18 BI-DIRECTIONAL FIFO, 6.5 ns, PQFP128
封裝： TQFP-128
文件頁(yè)數(shù)： 23/26頁(yè)
文件大?。?/td> 334K
代理商： IDT72835LB10PF
23
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72805LB/72815LB/72825LB/72835LB/72845LB CMOS Dual SyncFIFO
TM
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
OPERATING CONFIGURATIONS
SINGLE DEVICE CONFIGURATION
Each of the two FIFOs contained in a single IDT72805LB/72815LB/
72825LB/72835LB/72845LB may be used as a stand-alone device when
the application requirements are for 256/512/1,024/2,048/4,096 words or
less. These FIFOs are in a single Device Configuration when the First Load
(
FL
), Write Expansion In (
WXI
) and Read Expansion In (
RXI
) control inputs
are configured as (
FL
,
RXI
,
WXI
= (0,0,0), (0,0,1), (0,1,0), (1,0,0), (1,0,1) or
(1,1,0) during reset (Figure 28).
Figure 28. Block Diagram of Single 256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18, 4,096 x 18 Synchronous FIFO
(One of the two FIFOs contained in the IDT72805LB/72815LB/72825LB/72835LB/72845LB)
Figure 29. Block Diagram of the two FIFOs contained in one IDT72805LB/72815LB/72825LB/72835LB/72845LB
configured for a 36-bit Width Expansion
WIDTH EXPANSION CONFIGURATION
Word width may be increased simply by connecting together the control
signals of FIFO A and B. Status flags can be detected fromany one device.
The exceptions are the Empty Flag/Output Ready and Full Flag/Input
Ready. Because of variations in skew between RCLK and WCLK, it is
possible for flag assertion and deassertion to vary by one cycle between
FIFOs. To avoid problems the user must create composite flags by gating
the Empty Flags/Output Ready of every FIFO, and separately gating all Full
Flags/Input Ready. Figure 29 demonstrates a 36-word width by using one
IDT72805LB/72815LB/72825LB/72835LB/72845LBs. Any word width can
be attained by adding additional IDT72805LB/72815LB/72825LB/72835LB/
72845LBs. These FIFOs are in a single Device Configuration when the First
Load (
FL
), Write Expansion In (
WXI
) and Read Expansion In (
RXI
) control
inputs are configured as (
FL
,
RXI
,
WXI
= (0,0,0), (0,0,1), (0,1,0), (1,0,0),
(1,0,1) or (1,1,0) during reset (Figure 29). Please see the Application Note
AN-83.
WRITE CLOCK (WCLK)
WRITE ENABLE (
WEN
)
READ CLOCK (RCLK)
READ ENABLE (
REN
)
LOAD (
LD
)
OUTPUT ENABLE (
OE
)
DATA IN (D
0
- D
17
)
DATA OUT (Q
0
- Q
17
)
FULL FLAG/INPUT READY (
FF
/
IR
)
PROGRAMMABLE (
PAE
)
HALF-FULL FLAG (
HF
)
EMPTY FLAG/OUTPUT READY (
EF
/
OR
)
PROGRAMMABLE (
PAF
)
RESET (
RS
)
IDT
72805
72815
72825
72835
72845
3139 drw 28
FL
RXI
WXI
FIFO A OR B
WRITE CLOCK (WCLK)
WRITE ENABLE (
WEN
)
READ CLOCK (RCLK)
READ ENABLE (
REN
)
LOAD (
LD
)
PROGRAMMABLE (
PAE
)
OUTPUT ENABLE (
OE
)
PROGRAMMABLE (
PAF
)
DATA IN (D)
DATA OUT (Q)
FULL FLAG/INPUT
READY (
FF
/
IR
)
HALF FULL FLAG (
HF
)
EMPTY FLAG/OUTPUT
READY (
EF
/
OR
)
RESET (
RS
)
FIFO A
FIFO B
RESET (
RS
)
36
36
18
18
18
18
FF
/
IR
EF
/
OR
3139 drw 29
FL
WXI RXI
FL
WXI RXI
FF
/
IR
EF
/
OR
NOTE:
1. Do not connect any output control signals directly together.
相關(guān)PDF資料
PDF描述
IDT72835LB10PFI CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUAL 4,096 x 18
IDT72835LB15BG CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUAL 4,096 x 18
IDT72835LB15BGI CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUAL 4,096 x 18
IDT72835LB15PF CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUAL 4,096 x 18
IDT72835LB15PFI CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUAL 4,096 x 18
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT72835LB10PF8 功能描述:IC FIFO SYNC DL 2048X18 128TQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤(pán) 其它名稱(chēng):72271LA10PF
IDT72835LB15PF 功能描述:IC FIFO SYNC DL 2048X18 128TQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤(pán) 其它名稱(chēng):72271LA10PF
IDT72835LB15PF8 功能描述:IC FIFO SYNC DL 2048X18 128TQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤(pán) 其它名稱(chēng):72271LA10PF
IDT72835LB15PFI 功能描述:IC FIFO SYNC DL 2048X18 128TQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤(pán) 其它名稱(chēng):72271LA10PF
IDT72835LB15PFI8 功能描述:IC FIFO SYNC DL 2048X18 128TQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤(pán) 其它名稱(chēng):72271LA10PF
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